WP13110 IO Chassis Timing Card upgrades

Marc, Erik, Tony, Dave:

We upgraded the Mid and End Station IO Chassis. They all had the TC firmware upgrade and only needed the sync ribbon cable upgrade. All the models were running RCG5.5.2 with the exception of SEI and PEM-MID which were still at RCG5.5.0. These were upgraded by performing a rev-locked build in place with the new RCG. No DAQ restart was needed.

Only issue was h1susauxey did not power completely power down when the systemctl poweroff command was issued and I had to use IPMI to complete the power down.

Status of the IO Chassis upgrade can be found at T2600143

BSC2 SWWD trips and LSC Timing glitch

Late in the afternoon the B2H34 SWWD tripped due to BSC2 work. Because the beam splitter sus is now combined with HAM3,4 I chose to untrip this WD rather than leave it down overnight.

Around this time h1ioplsc0 jumped a timing cycle, most probably due to rack/wiring work. I restarted all the models on h1lsc0 to clear this.

Restart Log:

Thu09Apr2026
LOC TIME HOSTNAME     MODEL/REBOOT
13:45:25 h1susex      ***REBOOT*** <<< EX IO Chasis work
13:45:28 h1seiex      ***REBOOT***
13:45:31 h1iscex      ***REBOOT***
13:45:35 h1susauxex   ***REBOOT***
13:46:34 h1susauxex   h1iopsusauxex
13:46:47 h1susauxex   h1susauxex  
13:47:01 h1susex      h1iopsusex  
13:47:08 h1seiex      h1iopseiex  
13:47:12 h1iscex      h1iopiscex  
13:47:14 h1susex      h1susetmx   
13:47:21 h1seiex      h1hpietmx   
13:47:25 h1iscex      h1pemex     
13:47:27 h1susex      h1sustmsx   
13:47:34 h1seiex      h1isietmx   
13:47:38 h1iscex      h1iscex     
13:47:40 h1susex      h1susetmxpi 
13:47:51 h1iscex      h1calex     
13:48:04 h1iscex      h1alsex     
14:04:08 h1pemmx      ***REBOOT*** <<< MX IO Chassis work
14:05:05 h1pemmx      h1ioppemmx  
14:05:18 h1pemmx      h1pemmx     
14:31:11 h1iscey      ***REBOOT*** <<< EY IO Chassis wor
14:31:13 h1susey      ***REBOOT***
14:31:19 h1seiey      ***REBOOT***
14:31:30 h1susauxey   ***REBOOT***
14:32:29 h1susauxey   h1iopsusauxey
14:32:42 h1susauxey   h1susauxey  
14:32:42 h1susey      h1iopsusey  
14:32:52 h1iscey      h1iopiscey  
14:32:53 h1seiey      h1iopseiey  
14:32:55 h1susey      h1susetmy   
14:33:05 h1iscey      h1pemey     
14:33:06 h1seiey      h1hpietmy   
14:33:08 h1susey      h1sustmsy   
14:33:18 h1iscey      h1iscey     
14:33:19 h1seiey      h1isietmy   
14:33:21 h1susey      h1susetmypi 
14:33:31 h1iscey      h1caley     
14:33:44 h1iscey      h1alsey     
14:42:46 h1pemmy      ***REBOOT*** <<< MY IO Chassis work
14:43:43 h1pemmy      h1ioppemmy  
14:43:56 h1pemmy      h1pemmy     
17:22:46 h1lsc0       h1ioplsc0   <<< Recover LSC0 from timing glitch
17:23:00 h1lsc0       h1lsc       
17:23:14 h1lsc0       h1lscaux    
17:23:28 h1lsc0       h1sqz       
17:23:42 h1lsc0       h1ascsqzfc