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Reports until 09:25, Thursday 23 July 2026
H1 CDS
david.barker@LIGO.ORG - posted 09:25, Thursday 23 July 2026 (91209)
Adjustment of EDC to DAQ timing to mitigate occassional 0leg CRC errors

Jonathan, Erik, Dave:

Following the upgrade of EDC and its front end (h1susauxb13) to Deb13/RCG-5.6.5 on Tuesday, we initially had EDC CRC errors on both legs at a rate of 1-6Hz. This had not been seen at LLO during their upgrade. The main difference is the number of EDC channels, LLO=45k, LHO=61k.

Erik changed two parameters, the EDC delay (D ) and the EDC cps-xmit delay (X), both in mS. Originally we had D=10,X=34. This gave the EDC CRC error rate after the upgrade. Erik tried reducing X to 5mS, no change. He then reduced D to -10mS and the errors stopped. To minimize the impact on the other frontends, X was put back to 34mS with no immediate problem.

Over the next day we had two sets of 0-leg CRCs on h1susauxb13 and h1susauxh2. Interestingly the CRCs on h1susauxb13 were only for the models (h1iopsusauxb13 and h1susauxb13) and not the EDC.

On Wednesday 22jul2026  at 14:13 Erik changed D to +1mS. We have had no CRC events since then, +19 hours and counting.

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