WP13479 Move last ADC in h1susb2h34 in front of the LIGO-DACs
Erik, Jonathan, EJ, TJ, Dave:
The 3rd ADC, which was after the LIGO-DACs on the PCI bus, was moved to be before the LIGO-DACs. EJ found that if a General Standards card followed the LIGO DACs, and there are other General Standard DACs in the chassis, then the DAC mapping became ambiguous. This was first discovered by TJ when he noticed that the LIGO-DAC card temperatures was being reported as -1C (not being read). We then found that model's LIGO-DAC drive counts were being reported by h1iopsusb2h34 on the wrong DAC MEDM.
A quick fix as to move the ADC inside the IO Chassis from after to before the LIGO-DACs
The original card layout (BIO not shown):
| empty | empty | empty | ***ADC2*** | LIGO-DAC1 | LIGO-DAC0 | 20bit-DAC1 | ADC1 | 20bit-DAC0 | ADC0 | empty | Timing | ||
| A3-4 | A3-3 | A3-2 | A3-1 | A2-4 | A2-3 | A2-2 | A2-1 | A1-4 | A1-3 | A1-2 | A1-1 |
The new card layout (BIO not shown):
| empty | empty | LIGO_DAC1 | LIGO-DAC0 | empty | ***ADC2*** | 20bit-DAC1 | ADC1 | 20bit-DAC0 | ADC0 | empty | Timing | ||
| A3-4 | A3-3 | A3-2 | A3-1 | A2-4 | A2-3 | A2-2 | A2-1 | A1-4 | A1-3 | A1-2 | A1-1 |
I was able to shuffle the cards without disconnecting any rear cables except ADC2 (SUS_HAM_209) and the MTP. The cables had enough slack to pull the chassis out to access the card screws. At the rear I was able to push the h1susauxb2h34 chassis forward to access the interface cards.
Internally only ADC2's ribbon cable needed to be disconnected.
TJ methodically started driving the top stages for MC2, PR2 and BS. We verified the model's and IOP's MEDM reported the correct channels being driven.
I trended the ADC2 channels from before and after its move to verify it is connected correctly.