J. Kissel, T. Shaffer As a continued parts of the recovery, even after Tony reset the alignment sliders for all suspensions to a time prior to the dolphin crash, we continued struggling to align the SRC. Trending the OSEMs, we found that OM2 had particularly different align than the beginnings the last successful lock acquisition attempt. OM3 also showed a bit of drift due to the temperature excursion. So, we've now restored the alignment to the OSEM values to 2023-05-10 23:11 UTC, and initial alignment seems to be going much better now. (The attached trend shows pitch on the left, and yaw on the right, for columns of OM1, OM2, and OM3. The horizontal cursor Y1 is set to the 2023-05-10 23:11 UTC values in each, and the Y2 cursor is set to what the values were just before this fix.) FIXED IT.
J. Kissel, E. Capote, T. Shaffer We're struggling through alignment of the SRC during lock acquisition, and we looked through some trends of SR3 alignment and we see that it's alignment is quite off in Yaw. TJ said "Oh, well, yeah, the temperature in the VEA has gone bad. That's normal." Trusting but verifying, I trended the average of zones in the LVEA, and I disagree -- there as a marked step-change in the LVEA temperature starting at 2023-05-10 13:45 PDT (20:45 UTC), which, over the course of a day has increased the output arm's temperature by 1 deg C, or ~2 deg F. Perhaps a set point got lost?
After receiving a call from the control room regarding a temperature increase in the HAM 6 area, Tyler and I looked at the FMCS and found that for some reason, AHU 2 was off, both fans down. There has been some fire panel testing which may have contributed to this issue. AHU 2 was restarted and both fans came back up. Made a few adjustments to the dampers for air flow and all seems to be running as designed. I will continue to monitor.
AHU = Air Handler Unit FIXED IT.
J. Kissel I blame the dolphin crash last night LHO:69492, but I saw the that PCALX RX PD showed some excess noise up on the front wall FOM so I've open and re-closed both PCALX and PCALY optical follower servo (OFS) enable switch. FIXED IT. PCALs functional again as of May 11 2023 18:17 UTC.
J. Kissel
While chasing other SDF issues, I found the yellow warning lights on the SDF overview screen indicating that there were front-end models had some channels that were either new and not yet monitored, or removed and no longer found.
Those models were
- h1sqz, h1ioppsl
- h1pemcs
which, it seems to correspond exactly with what front-end models were changed this morning -- see LHO:69502.
I've cleaned them up -- all new channels are now monitored, and removed channels have now been purged from the SDF safe.snap.
we may have to run through this again once the SDF comparison switches over to the OBSERVE.snap.
Tony had a rough night after teh Dolphin crash. I started by trying an initial alignment after we did some opportunistic model restarts and DAQ restarts. We've been having issues with the XARM_IR state recently, and Jeff came in and immediately guessed what it was (alog69499) and when we reverted to pre May 5th settings, it locked right up. The rest of initial alignment was straight forward. I did have to moce SRM quite a bit for the SRC step to increase H1:H1:ASC-AS_A_DC_NSUM highs and lows as usual procedure.
Since initial alignment the IFO has been catchin DRMI in an awkward mode and I haven't been able to fix it in time. We've now locked a PRMI to help with the BS, and while that helped it still didn't fix DRMI enough. At this point there must still be a misalignment in the output arm.
Thu May 11 10:05:03 2023 INFO: Fill completed in 5min 2secs
Gerardo confirmed a good fill curbside
Mini-Maintenance Morning.
WP11183 h1omc remove unused ADC channels
Daniel, Dave:
A new h1omc model was installed. The old model was reading some ADC channels and immediately terminating them. These have been removed. No DAQ restart was required.
WP11188 PSL FSS add NPRO TEMP fast channel to DAQ
Jason, Robert, Adrian, Dave:
The PSL FSS common model (pslfss.mdl) was changed to add the output of the NPRO_TEMP filter module to DAQ at the lowest rate of 256Hz. DAQ restart required, but since this is just an INI file change I did not need to restart the model, I did a DAQ LOAD instead.
++: fast channel H1:PSL-FSS_NPRO_TEMP_OUT_DQ added to the DAQ
WP11190 PEM add HAM7 FC1 ACC to h1pemcs and DAQ
Robert, Adrian, Fil, Dave:
A new h1pemcs model was installed. We have repurposed 3 channels from the 6th ADC to read the ACC_HAM7_FC_[X,Y,Z] channels. These were originally read by generic filter-modules and not acquired by the DAQ.
The X, Y, Z channels are being acquired by DAQ at 8kHz.
Latest SQZ models
Daniel, Dave:
Daniel's latest h1ioplsc0 and h1sqz models were installed. DAQ restart was required.
DAQ Restart
Dave:
The DAQ was restarted to support the above changes. FW0 was restarted at 08:55 and at 09:00 when it was attempting to write all three types of frame file its daqd crashed and restarted. It has been stable since.
GDS0 needed a second restart.
No problems with the 1-leg restart.
Thu11May2023
LOC TIME HOSTNAME MODEL/REBOOT
08:50:14 h1oaf0 h1pemcs <<< ACC HAM7 FC1
08:51:21 h1lsc0 h1ioplsc0 <<< New h1ioplsc0 and h1sqz
08:51:35 h1lsc0 h1lsc
08:51:49 h1lsc0 h1lscaux
08:52:03 h1lsc0 h1sqz
08:52:17 h1lsc0 h1ascsqzfc
08:53:33 h1omc0 h1omc <<< remove unused ADC channels
08:55:03 h1daqdc0 [DAQ]
08:55:14 h1daqfw0 [DAQ]
08:55:14 h1daqtw0 [DAQ]
08:55:15 h1daqnds0 [DAQ]
08:55:22 h1daqgds0 [DAQ]
08:56:01 h1daqgds0 [DAQ] <<< 2nd GDS0 restart
08:59:50 h1daqfw0 [DAQ] <<< FW0 crash
09:02:31 h1daqdc1 [DAQ]
09:02:40 h1daqfw1 [DAQ]
09:02:40 h1daqtw1 [DAQ]
09:02:43 h1daqnds1 [DAQ]
09:02:51 h1daqgds1 [DAQ]
DAQ Changes, num channels added/removed
| model | fast removed | slow removed | fast added | slow added |
| h1pemcs | 0 | 33 | 3 | 3 |
| h1ioplsc0 | 0 | 1 | 0 | 11 |
| h1sqz | 0 | 1 | 0 | 11 |
| h1omc | 0 | 0 | 0 | 0 |
| h1pslfss | 0 | 0 | 1 | 0 |
DAQ Channels Removed [name, bytes_per_sample, data_rate_Hz]
H1:PEM-CS_ADC_5_11_EXCMON 4 16
H1:PEM-CS_ADC_5_11_GAIN 4 16
H1:PEM-CS_ADC_5_11_INMON 4 16
H1:PEM-CS_ADC_5_11_LIMIT 4 16
H1:PEM-CS_ADC_5_11_OFFSET 4 16
H1:PEM-CS_ADC_5_11_OUT16 4 16
H1:PEM-CS_ADC_5_11_OUTPUT 4 16
H1:PEM-CS_ADC_5_11_SWMASK 4 16
H1:PEM-CS_ADC_5_11_SWREQ 4 16
H1:PEM-CS_ADC_5_11_SWSTAT 4 16
H1:PEM-CS_ADC_5_11_TRAMP 4 16
H1:PEM-CS_ADC_5_12_EXCMON 4 16
H1:PEM-CS_ADC_5_12_GAIN 4 16
H1:PEM-CS_ADC_5_12_INMON 4 16
H1:PEM-CS_ADC_5_12_LIMIT 4 16
H1:PEM-CS_ADC_5_12_OFFSET 4 16
H1:PEM-CS_ADC_5_12_OUT16 4 16
H1:PEM-CS_ADC_5_12_OUTPUT 4 16
H1:PEM-CS_ADC_5_12_SWMASK 4 16
H1:PEM-CS_ADC_5_12_SWREQ 4 16
H1:PEM-CS_ADC_5_12_SWSTAT 4 16
H1:PEM-CS_ADC_5_12_TRAMP 4 16
H1:PEM-CS_ADC_5_13_EXCMON 4 16
H1:PEM-CS_ADC_5_13_GAIN 4 16
H1:PEM-CS_ADC_5_13_INMON 4 16
H1:PEM-CS_ADC_5_13_LIMIT 4 16
H1:PEM-CS_ADC_5_13_OFFSET 4 16
H1:PEM-CS_ADC_5_13_OUT16 4 16
H1:PEM-CS_ADC_5_13_OUTPUT 4 16
H1:PEM-CS_ADC_5_13_SWMASK 4 16
H1:PEM-CS_ADC_5_13_SWREQ 4 16
H1:PEM-CS_ADC_5_13_SWSTAT 4 16
H1:PEM-CS_ADC_5_13_TRAMP 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD 4 16
DAQ Channels Added [name, bytes_per_sample, data_rate_Hz]
H1:PEM-CS_ACC_HAM7_FC1_X_DQ 4 8192
H1:PEM-CS_ACC_HAM7_FC1_X_MON 4 16
H1:PEM-CS_ACC_HAM7_FC1_Y_DQ 4 8192
H1:PEM-CS_ACC_HAM7_FC1_Y_MON 4 16
H1:PEM-CS_ACC_HAM7_FC1_Z_DQ 4 8192
H1:PEM-CS_ACC_HAM7_FC1_Z_MON 4 16
H1:PSL-FSS_NPRO_TEMP_OUT_DQ 4 256
H1:SQZ-ADF_VCXO_OSC_DEMOD_EXCMON 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_GAIN 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_INMON 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_LIMIT 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_OFFSET 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_OUT16 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_OUTPUT 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_SWMASK 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_SWREQ 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_SWSTAT 4 16
H1:SQZ-ADF_VCXO_OSC_DEMOD_TRAMP 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_EXCMON 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_GAIN 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_INMON 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_LIMIT 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_OFFSET 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_OUT16 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_OUTPUT 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_SWMASK 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_SWREQ 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_SWSTAT 4 16
H1:SQZ-FC_BEAT_RF_OSC_DEMOD_TRAMP 4 16
Adding some information regarding the FW0 restart. The logs show it as missed data, skipping 18 cycles. I'm adding some plots of timing and state in the system. I find this interesting as usually with missed cycles we see abnormalities in the recv time values. Long IO (which can also lead to backups) often show themselves with low buffer counts in the main buffer. This is not the case. Things look good right up until it dies that it all goes bad with no warning or buildup.
R. Kumar, J. Kissel, T. Shaffer TJ let me know that Rahul found that the RT and SD OSEM sensors have died on Jan 16 2023 08:15 am PST (16:15 UTC). Thankfully, we don't use any alignment offsets on the OSEMs, so this will have only impacted the damping loops. The HAM56 wiring diagram (D1002740) suggests that these two OSEMs are on the same signal chain, and alone on that signal chain, so this should be a relatively easy swap.
Opened FRS Ticket FRS Ticket 27900
Very interesting find! I've let DetChar know in the chat channel that you've found this, so hopefully they can take a look to see if this is related to our 4 Hz 'bumps' in our spectrum.
- Tried a quick digital offset test to confirm whether the *coils* are dead too, and confirmed that the coils don't cause any current to show up in the corresponding FAST_I_MON coil driver current monitor channels. Coils are dead too - Went out to the racks to see if, for some reason, either the coil driver chassis or satellite amps we OFF. Found OMC TOP Coil Driver S1102660 in U36 of rack SUS C7 OFF - Tried "just" flipping the power rocker switch ON, and it powered on briefly, power indiciator LEDs showed +15 V was getting power, but -15V was not, and within moments the chassis power rocker switch tripped OFF, and then I could no longer turn it back on (the power supply fuse did / is doing the right thing).-15V power leg to the chassis has failed. Filed work permit 11191 to have it replaced. As far as we can tell from the E-traveler, and a quick scan of the DCC for ECRs, we see no indication that the S1102660 driver chassis has been modified from its original design (D1003116), but no guarantees.
Coil driver replaced with S1102657. OSEM sensors are functional again. Drove offsets into RT and SD and confirmed that FAST_I_MONs are reading back current during offsets. FIXED IT. Good to go. Thanks Rahul and Fil!! We'll take some top-to-top transfer functions on Tuesday to super confirm functionality, but we're back in business. OMC RT and SD OSEMs functional again as of May 11 2023 17:40 UTC.
J. Kissel, T. Shaffer I came in this morning and TJ was having trouble with initial alignment, and having trouble in the same steps -- ALIGN_IFO guardian's XARM IR LOCKED state -- that he says operators have been struggling with "all week." Namely, the ALIGN_IFO / INIT_ALIGN guardians would suggest that the XARM was locked, but it was not -- it would trigger but not hold. The practice in that past week was to "just skip" ALIGN_IFO guardian's XARM IR LOCKED state, where we use POP_A_45 to lock the XARM. I connected the dots between "trouble with POP" and us needing to decrease the POP_A_45 analog gain to allow for an increased SRCL offset during normal, nominal low noise last week LHO:69350. As such, TJ and I tried reverting the analog gain, H1:LSC-POP_A_RF45_WHITEN_GAIN, to +21 dB, and then compensated the analog gain increase with the corresponding digital gain compensation -- switching back to FM4 in the H1:LSC-POP_A_RF45_I and H1:LSC-POP_A_RF45_Q banks. Reverting to higher gain immediately restored the functionality of the XARM IR LOCKED. FIXED IT. So, we'll code this adjustment up in the initial alignment guardian sequence.
This is now loaded into the ALIGN_IFO node to change it to 21 and the ISC_LOCK guardian to change it back. SDF_Revert should cover the FM change back, but not the gain change. With an over amount of caution we put both in ISC_LOCK. We will need to test this with initial alignment soon.
TITLE: 05/11 Day Shift: 15:00-23:00 UTC (08:00-16:00 PST), all times posted in UTC
STATE of H1: Aligning
CURRENT ENVIRONMENT:
SEI_ENV state: CALM
Wind: 8mph Gusts, 6mph 5min avg
Primary useism: 0.06 μm/s
Secondary useism: 0.20 μm/s
QUICK SUMMARY: Been locking on PRMI for a large chunk of the night, but the output arm must be off. Since we aren't locking well at the moment we are going to opportunistically restart some models that have been pending.