TITLE: 11/05 Eve Shift: 0030-0600 UTC (1630-2200 PST), all times posted in UTC
STATE of H1: Wind
OUTGOING OPERATOR: Ryan S
CURRENT ENVIRONMENT:
    SEI_ENV state: CALM
    Wind: 32mph Gusts, 18mph 3min avg
    Primary useism: 0.09 μm/s
    Secondary useism: 0.51 μm/s
QUICK SUMMARY:

• We've been down due to the wind for most of the day, we've been running some test to find the source of the FSS issues
  • Trying to hold IMC lock with and without the ISS first loop
• Windy.com predicts the wind storm will peak around 4-5pm PST (00-01 UTC), and calm down around the end of the shift, 10-11pm PST (06-07 UTC)
• 2ndary microseism is decreasing, its just below the 90th percentile

TITLE: 11/04 Day Shift: 1530-0030 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Environment - Wind
INCOMING OPERATOR: Ryan C
SHIFT SUMMARY: H1 has been down all shift due to high microseism for the first half of the day and high winds for the second. Meanwhile, we've been able to continue glitch investigations with the PSL/IMC from alog80990. We sat with the IMC locked and ISS off for 2 hours starting at 21:37 and saw no fast glitches (trend in first attachment, white background). After turning the ISS back on, things were calm for a while before the IMC lost lock at 23:54 (second attachment, black background). There were three more IMC locklosses within 10 minutes of this, but things have been steady again since.

• 15:30 - H1 down, starting initial alignment
• 16:12 - IA finished, starting lock acquisition
• 17:55 - No success in locking; H1 to IDLE for power cycle of h1psl0 and card swaps (alog81048)
• 20:38 - Chassis work finished, starting lock acquisition
• 21:24 - Wind too high to keep arms locked, holding in PREP_FOR_LOCKING
  • 21:37 - Leaving IMC locked and ISS first loop unlocked for testing
  • 23:38 - Adding in ISS

LOG:

This alog is a continuation of previous efforts to correctly calibrate and compare the LSC couplings between Hanford and Livingston. Getting these calibrations right has been a real pain, and there's a chance that there could still be an error in these results.

These couplings are measured by taking the transfer function between DARM and the LSC CAL CS CTRL signal. All couplings were measured without feedforward. The Hanford measurements were taken during the March 2024 commissioning break. The Livingston MICH measurement is from Aug 29 2023 and the PRCL measurement from June 23 2023.

As an additional note, during the Hanford MICH measurement, both MICH and SRCL feedforward were off. However, for the Livingston MICH measurement, SRCL feedforward was on. For the PRCL measurements at both sites, both MICH and SRCL feedforward were engaged.

Results:

The first plot attached shows a calibrated comparison between the MICH, PRCL and SRCL couplings at LHO.

The second plot shows a calibrated comparison between the Hanford and Livingston MICH couplings. I also included a line indicating 1/280, an estimated coupling level for MICH based on an arm cavity finesse of 440. Both sites have flat coupling between about 20-60 Hz. There is a shallow rise in the coupling above 60 Hz. I am not sure if that's real, or some artifact of incorrect calibration. The Hanford coupling below 20 Hz has steeper response, which appears like some cross coupling between SRCL perhaps (it looks about 1/f^2 to me). Maybe this is present because SRCL feedforward was off.

The third plot shows a calibrated comparison between the Hanford and Livingston PRCL couplings. I have no sense of what this coupling should look like. If the calibration here is correct, this indicates that the PRCL coupling at Hanford is about an order of magnitude higher than Livingston. Whatever coupling is present has a different response between both sites, so I don't really know what to make of this.

Calibration notes:

The Hanford measurements used H1:CAL-DELTAL_EXTERNAL_DQ and the darm calibration from March 2024 (/ligo/groups/cal/H1/reports/20240311T214031Z/deltal_external_calib_dtt.txt)

The Livingston measurement used L1:OAF-CAL_DARM_DQ and a darm calibration that Dana Jones used in her previous work (74787, saved in /ligo/home/dana.jones/Documents/cal_MICH_to_DARM/L1_DARM_calibration_to_meters.txt)

LHO MICH calibration: I updated the CAL CS filters to correctly match the current drive filters. However, I made the measurement in March 11 before catching some errors in the filters. I incorrectly applied a 200:1 filter, and multiplied by sqrt(1/2) when I should have multipled by sqrt(2) (76261). Therefore, my calibration includes a 1:200 filter and a factor of 2 to appropriately compensate for these mistakes. Additionally, my calibration includes a 1e-6 gain to convert from um to m, and an inverted whitening filter [100, 100:1, 1]. This is all saved in a DTT template: /ligo/home/elenna.capote/LSC_calibration/MICH_DARM_cal.xml

LLO MICH calibration: I started with Dana Jones' template (74787), and copied it over into my directory: /ligo/home/elenna.capote/LSC_calibration/LLO_MICH.xml. I inverted the whitening filter using [100,100,100,100,100:1,1,1,1,1] and applied a gain of 1e-6 to convert um to m.

LHO PRCL calibration: I inverted the whitening using [100,100:1,1] and converted from um to m with 1e-6.

LLO PRCL calibration: I inverted the whitening using [10,10,10:1,1,1] and converted from um to m with 1e-6.

I exported the calibrated traces to plot myself. Plotting code and plots saved in /ligo/home/elenna.capote/LSC_calibration

Mon Nov 04 10:10:29 2024 INFO: Fill completed in 10min 26secs

WP12186

Richard, Fil, Erik, Dave:

We performed a complete power cycle of the h1psl0. Note, this is not on the Dolphin fabric so no fencing was needed. Procedure was

• Stop all models and power down h1psl0 computer
• Power down IO Chassis, all AA chassis and all AI chassis.
• Wait for a minute
• Power up AA chassis and IO Chassis (keep AI's off)
• Power up h1psl0 computer, wait for models to start
• Finally, power up AI chassis.

The system was power cycled at 10:11 PDT. When the iop model started, it reported a timing error. The duotone signal (ADC0_31) was a flat line signal of about 8000 counts with a noise of a few counts.

Erik thought the timing card had not powered up correctly, so we did a second round of power cycles at 10:30 and this time the duotone was correct.

NOTE: the second ADC failed its AUTOCAL on both restarts. This is the PSL FSS ADC.

If we continue to have FSS issues, the next step is to replace the h1pslfss model's ADC and 16bit DAC cards.

[   45.517590] h1ioppsl0: INFO - GSC_16AI64SSA : devNum 0 : Took 181 ms : ADC AUTOCAL PASS
[   45.705599] h1ioppsl0: ERROR - GSC_16AI64SSA : devNum 1 : Took 181 ms : ADC AUTOCAL FAIL
[   45.889643] h1ioppsl0: INFO - GSC_16AI64SSA : devNum 2 : Took 181 ms : ADC AUTOCAL PASS
[   46.076046] h1ioppsl0: INFO - GSC_16AI64SSA : devNum 3 : Took 181 ms : ADC AUTOCAL PASS

C. Compton, R. Short

I've updated the PSL_FSS Guardian so that it won't jump into the FSS_OSCILLATING state whenever there's just a quick glitch in the FSS_FAST_MON_OUTPUT channel. Whenever the FSS fastmon channel is over its threshold of 0.4, the FSS_OSCILLATION channel jumps to 1, and the PSL_FSS Guardian responds by dropping the common and fast gains to -10 dB then stepping them back up to what they were before. This is meant to catch when there's a servo oscillation in the FSS, but it's also been happening when the FSS glitches. Since moving the gains around makes it difficult for the IMC to lock, the Guardian should now only do that when there's an actual oscillation and should save time relocking the IMC.

FAMIS 31058

Trends are all over the place in the last 10 days due to several incursions, but I motsly tried to focus on how things have looked since we brought the PSL back up fully last Tuesday (alog80929). Generally things have been fairly stable, and at least for now, I dn't see the PMC reflected power slowly increasing anymore.

TITLE: 11/04 Day Shift: 1530-0030 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Lock Acquisition
OUTGOING OPERATOR: Corey
CURRENT ENVIRONMENT:
    SEI_ENV state: USEISM
    Wind: 28mph Gusts, 19mph 3min avg
    Primary useism: 0.07 μm/s
    Secondary useism: 0.56 μm/s
QUICK SUMMARY: H1 has been sitting in PREP_FOR_LOCKING since 08:05 UTC. Since the secondary microseism has been slowly decreasing, I'll try locking H1 and we'll see how it goes.

• Wind gusts moderate, microseism around 90th percentile
• All other systems nominal

TITLE: 11/04 Eve Shift: 0030-0600 UTC (1630-2200 PST), all times posted in UTC
STATE of H1: Microseism, LOCK_ACQUISITION
INCOMING OPERATOR: Corey
SHIFT SUMMARY:

We spent most of the day with the secondary microseism mostly above the 90th percentile, it started to decrease ~8 hours ago but still remains about half above the 90th percentile. The elevated microseism today is from both the storms by Greenland and the Aleutians as seen by the high phase difference for both the arms with the corner station (bottom plot).

We keep losing it at the beginning of LOWNOISE_ESD_ETMX, I see some ASC ringups on the top of NUC29 (CHARD_P I think?), no FSS glitches before the locklosses, no tags on the lockloss tool besides WINDY. It's always a few seconds into the run method, I was able to avoid this by slowly stepping through some of the higher states (PREP_ASC, ENGAGE_ASC, MAX_POWER, LOWNOISE_ASC). I'm not sure which of these is the most relevent to not see the ringup, probably not the ASC states as when I paused there but forgot MAX_POWER I still saw the ringup.

LOG: No log.

• 00:53 UTC LOWNOISE_ESD_ETMX lockloss
• 01:57 UTC LOWNOISE_ESD_ETMX lockloss
  • These both had similar behavior to what Corey saw here alog80720 and TJ here alog80954
• 02:44 UTC MAX_POWER lockloss (did not ring up the violins luckily)
  • IMC lost it at the same time as ASC, FSS_FAST channel starting growing ~7 seconds before the LL
  • Over a dozen IMC locklosses trying to get to GREEN_ARMS
• 03:30 UTC LOWNOISE_ESD_ETMX lockloss
  • I tried stepping a little slower through some of the states leading up to it (PREP and engage ASC), I was going to also pause in MAX POWER but I accidentally moved it on
• 04:00 UTC PREP_DC_READOUT_TRANSITION lockloss
  • IMC and ASC lost it at the same time, some small FSS glitches starting ~350ms before the LL
  • PSL-FSS_AUTOLOCK_STATE moved ~20 ms before ASC
• 04:41 UTC lockloss TRANSITION_FROM_ETMX
  • Things were looking great (The ASC signals mainly), I had paused for 30-45 seconds after PREP_ASC and ENGAGE_ASC, then I waited 60 seconds after MAX_POWER and another 60 seconds after LOWNOISE_ASC finished
  • ASC lost it 150ms before IMC, I did not see any ASC ringups this time (IMC_REFL_SERVO_SPLITMON ran away?)
• 05:38 UTC TRANSITION_FROM_ETMX lockloss, lost it at a different spot in the run method than before
  • No ASC ringup, ASC lost it ~100ms before IMC

TITLE: 11/04 Day Shift: 1530-0030 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Microseism
INCOMING OPERATOR: Ryan C
SHIFT SUMMARY: Currently still trying to relock, and at POWER_25W. All day we've been working on getting back up, but the secondary microseism is so high. It is slowly coming down though. At one point, we were in OMC_WHITENING for over an hour trying to damp violins so we could go into NLN,  but we lost lock before we could get there.
LOG:

15:30 In DOWN due to very high secondary useism
15:38 Started relocking with an initial alignment
    - When we got to PRC, I had to do the Pausing-PSL_FSS-Until-IMC-Is-Locked thing again (see 81022)
    - 16:04 Initial alignment done, relocking
    - Lockloss from ACQUIRE_DRMI_1F, OFFLOAD_DRMI_ASC, ENGAGE_ASC_FOR_FULL_IFO, TRANSITION_FROM_ETMX
    - 18:07 Sitting in DOWN for a bit
    - 18:45 Started relocking
    - More locklosses
    - 21:48 Lost lock after sitting in OMC_WHITENING damping violins for over an hour
    - More trying to lock and losing lock                                                                                                                                               

 Most of the locklosses over this weekend have the IMC tag and those do show the IMC losing lock at the same time as AS_A, but since I don't have any further insight into those, I wanted to point out a few locklosses where the causes are different from what we've been seeing lately.

2024-11-02 04:17UTC

• No IMC tag, does have a DCPD tag
• Everything looking normal, then 100ms before the lockloss is first seen by anyone, PSL-ISS_AOM_DRIVER_MON_OUT shows a steep drop in value, getting larger in amplitude until the lockloss (ndscope1, ndscope2)

2024-11-02 17:13 UTC

• No IMC tag, does have a DCPD tag
• Everything looking normal, then 1s before the lockloss is first seen by anyone, PSL-ISS_AOM_DRIVER_MON_OUT shows a steep drop in value, getting larger in amplitude until the lockloss (ndscope3, ndscope4)
• Very similar to the above example, except the glitch isn't as steep. There is another one of these glitches that happens a few seconds before, but that one is even less steep and it is able to catch itself

2024-11-02 18:38:30.844238 UTC

• No IMC tag, does have a DCPD tag
• Small glitch in the FSS FASTMON channel caused NPRO temperature to spike and NPRO power jumps down, then ISS AOM DRIVERMON sees glitch up to the lockloss start (ndscope5, ndscope6-zoomed into FSS drop)

TITLE: 11/03 Eve Shift: 0030-0600 UTC (1630-2200 PST), all times posted in UTC
STATE of H1: Microseism
OUTGOING OPERATOR: Oli
CURRENT ENVIRONMENT:
    SEI_ENV state: USEISM
    Wind: 22mph Gusts, 18mph 3min avg
    Primary useism: 0.13 μm/s
    Secondary useism: 0.60 μm/s
QUICK SUMMARY:

• High microseism has made locking a struggle, in addition to the FSS issues
  • Violins have been rung up and we haven't stayed locked long enough to fully damp them for OMC_WHITENING
• Microseism seems to been slowly coming down
• Wind is increasing a little bit
• Relocking at CARM_TO_REFL

Closes FAMIS#27801

Last checked a week ago by Camilla, but since the water swap was done recently, I am doing the next check only a week later.

CO2X

• Before: 30.2
• After: 30.2
• Did not add any water

CO2Y

• Before: 10.2
• After: 10.2
• Did not add any water

There was no water in the leak cup.

Sun Nov 03 10:13:13 2024 INFO: Fill completed in 13min 10secs

Building on work last week, we installed a 2nd PI AI chassis (S1500301) in order to keep the PI signals separate from the ESD driver signals.  Original PI AI chassis S1500299.

We routed the LD32 Bank 0 thorugh the first PI AI chassis to the ESD drive L3, while keeping the old ESD driver signal driving the PI through the new PI AI chassis.

We routed the LD32 Bank 1 to the L2 & L1 suspension drive.

We did not route LD32 Bank 2 or Bank 3 to any suspensions.  The M0 and R0 signals are still being driven by the 18 bit DACs.

The testing did not go as smoothly as planned, a watchdog on DAC slot 5 (the L1&L2 drive 20 bit DAC) continousouly tripped the ESD reset line.  We solved this by attaching that open DAC port (slot 5) to the PI AI chassis to clear the WD error.

Looks like we made it to observing.

F. Clara, R. McCarthy, F. Mera, M. Pirello, D. Sigg