Related: alog 30221

In addition to what Daniel has posted, I measured the coherence and DBB QPDs again, this time in nominal low noise.

Probably due to lower IFO noise, the coherence is larger and broader, extending down to 70Hz or so.

The differences between today and yesterday are:

• Used pre-alignment servo to center the beam on QPDs, and then held the output of the PZT filters. So this is still totally open loop but the centering is much better.
• DBB PMC is kept very close to anti-resonance by adding offset to DBB PMC length PZT manually. During the measurement, transmission PD output was lower than 1.1mV. Compare this to about 8 or 9V when in resonance.
• IFO was in nominal low noise.
• The plot shows DCPD_SUM scaled arbitrarily by 3E6 instead of DELTAL_EXTERNAL.

I found that the OMC Trans camera's exposure was set very low (64).  It was changed on 30 Sept, but I'm not sure if this was meant to be a permanent change, so I've increased it to 600. This saturates the center of the camera, but it's more familiar.  If someone wanted to see the mode shape, we can turn the exposure back down.

J. Kissel

In the interest of providing supporting evidence for SUS data storage rates (see newly minted T1600432), I've taken a look at the coil output spectrum at the output of RM1, RM2, OM1, OM2, and OM3 during the latest nominal-low-noise lock stretch using both the requested DAC output (M1_MASTER_[UL,LL,UR,LR]_OUT) and the voltage monitors (M1_VOLTMON_[UL,LL,UR,LR]).

The messages: 
- On the OMs, for the current alignment scheme (OM1&2 used for 1-2 Hz BW "DC" centering on AS WFS; OM3 used at similar BW to center the beam onto the OMC breadboard), it's totally fine to store the OM VOLTMONs at the lowest possible "fast" rate of 256 Hz. There is no coherence between the output of these VOLTMONs and the requested drive (MASTER OUT) above ~5-10 Hz, and the requested drive is rolling off as a function of frequency.

- On the RMs, for the current alignment scheme (RM1&2 used for 1-2 Hz BW "DC" centering on REFL WFS), the coil requested output is completely coherent with the VOLTMONs out to ~1 [kHz]. That's silly. I've informed Jenne of this and she's identified several places that are lacking sensible low-pass filtering, which she'll install now that she's got the infrastructure to do so (LHO aLOG 30247). Once this is rectified, I'll confirm in comment to this aLOG, but I suspect that it'll also be totally fine to store the RM VOLTMONs at the lowest possible "fast" rate of 256 Hz.

- Because these poor suspensions are always the second last to be thought about, Ed's study of the coil driver monitors in support of FRS Ticket #5135 -- see LHO aLOGs 15176, 15312, and 17890 -- did not cover any of the RMs or OMs. As such, the problems with these monitors have not yet been called out explicitly. In doing this study, I've identified all of the problems with the HTTS VOLTMONS:
     - The following VOLTMONs are missing a factor of 2 in their gain (i.e. they're 2.0 lower than the expected, requested output): 
            OM1 UR & LR
            RM1 UR & LR
            RM2 UL & LL.
        Because this fault seems to come in pairs on a given side of the optic, my guess is that 1/2 of a differential leg is not making contact or is busted. 
     - The following VOLTMONs are just down-right busted and show garbage:
            RM1 LL
            RM2 LR.
I'll leave it to CDS as to whether they want to create individual FRSs on these, or just add to FRS Ticket #5135.

Details:
I've calibrated both the requested drive and measured drive into Volts right at the output of the DAC. Remember, the HTTSs (i.e. the RMs and OMs) were ISC built suspensions, which had to be different -- they have 16-bit DACs, not 18-bit DACs. Also, the low-pass filter of the HAM-A driver is permanently jumpered ON. 
Thus, The DTT calibrations into DAC [V] are as follows:
   MASTER OUT
     Gain: 3.0518e-04     (from the DAC gain of 20 / 2^16 [V dac/ct])
     Poles: (none)
     Zeros: (none)

   VOLTMON
     Gain: 2.7555e-04     (from ADC gain of 40 / 2^16 [V/ct] and the HAM-A driver gain of 1 / 2.215 [V dac/V out])
     Poles: 10, 21
     Zeros: 0.9, 212

More details of the HAM-A driver (D1100117) can be found in T1200264. Note for the attached ASDs, I faked the calibration of the factor-of-two busted channels by using a gain of 2 * 2.7e-4 = 5.5e-4 [V dac/ct].

The data templates in my home folder here:
/ligo/home/jeffrey.kissel/2016-10-05/
2016-10-05_H1SUSOM1_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSOM2_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSOM3_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSRM1_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSRM2_MASTEROUT_vs_VOLTMON.xml

model restarts logged for Tue 04/Oct/2016
2016_10_04 09:13 h1hpietmy
2016_10_04 09:13 h1iopseiey
2016_10_04 09:13 h1isietmy
2016_10_04 09:48 h1iopsusauxey
2016_10_04 09:48 h1susauxey
2016_10_04 10:10 h1iopsusauxey
2016_10_04 10:10 h1susauxey
2016_10_04 10:22 h1iopsusauxey
2016_10_04 10:23 h1iopsusauxey
2016_10_04 10:24 h1susauxey
2016_10_04 10:48 h1nds0
2016_10_04 11:04 h1nds0

h1seiey bio card swap. h1susauxey adc ribbon cable swap. h1nds0 mem upgrade.

The IFO node checks that all nodes in a list are in their nominal state, and if they are, then an operator can successfully click the intent bit to Observing. With Jamie's new addition to the python guardctrl client, we can grab a list of all nodes, and then subtract another list of "excluded" nodes that we do not need to watch in observing. The idea behind this exclude list is that a handful of nodes is easier to manage than 100 changing nodes.

Code is attached as a txt

late entry from yesterday

WP6211 h1seiey Binary Card Repacement

Richard, Fil, Jim:

h1seiey was powered cycled to replace its BIO card in the IO Chassis.

WP6213 h1susauxey ADC ribbon cable swap

Richard, Fil, Jim, Dave:

h1susauxey was powered down to replace the ribbon cables which connect ADC to interface cards for the second and third ADCs to fix 4000 count offset. We noted that the as-built drawing was out-of-date (needs updating). The replacement did not fully fix the problem. The 4000 count offset started in January 2016 when the h1susauxey IO Chassis was accidentally powered down during ESD-DAC work on h1susey.

WP6214 h1nds0 memory upgraded

Jamie, Dave, Jim

h1nds0 RAM was upgraded from 48GB to 72GB, this fixed Jamies nds client data errors.

h1guardian0 reboot

Jamie, Dave:

we rebooted the h1guardian0 machine, Jamie verfiied all guardian nodes came back correctly.

dns database change for conlog machine name changes

Patrick, Carlos, Jim.

CDS DNS was changed to reflect the new conlog machines names.

Check AUTOCAL status for all 18bit DACs

Dave:

I verified that all of the H1 18bit DACs successfully pass their autocalibration. This includes the PEM-DACs.

Attached is 30 day pressure trend along X/Y arms and chambers. 

The hump in pressures along x-arm was due to failing channel in ion pump #10 (IP10) at MX.

Since we're thinking about RAM (residual amplitude modulation), also known as RFAM (RF amplitude modulation), I did a quick Optickle simulation to see what effect RAM will have on some of our length degrees of freedom.

Here, all of the Optickle simulations plotted were run with 50W of PSL input power, and a +10pm DARM offset (+5pm for ETMX, -5pm for ETMY).  So far, I've just plotted the vertex length degrees of freedom, but I'll do a similar simulation for CARM and DARM soon.

The bottom panel of each of the attached PDFs shows power buildups that are relevant for that degree of freedom.  The other panels are the RF PDs that we use as error signals in full lock.  PRCL uses POP_9_I, MICH uses POP_45_Q, and SRCL uses a combination of POP_9_I and POP_45_I. 

One might note that even in the absence of RAM, the error signals do not have a zero crossing at 0m, and the power buildups for the carrier are not centered at zero.   This is a result of our finite DARM offset.  Removing the DARM offset centers things up closer to what your intuition would indicate. 

I've used a RAM modulation depth of 1e-3, which is roughly what we had measured at the 40m some time ago.  I haven't yet looked at Sheila's data from last night to update this value for us. 

Interestingly, the RAM always pushes the lock point offsets in the same direction, regardless of DARM offset.  But, the DARM offset changes which size of 0m each zero crossing is in the absence of RAM. So, with a positive DARM offset, having some RAM actually puts the zero crossing closer to 0m, while with a negative DARM offset the RAM pushes us farther away. 

WP6215 Proper low-passing of normalization signals.

Jenne, Dave:

restarted h1asc with new code. DAQ restart. No net fast channel change to DAQ frames (replaced 9 science frame chans and 2 commissioning frame channels).

DAQ restarted except for h1nds1 daqd, which did not get autostarted by monit. I started it manually via the monit web page.

I kind of think I saved the new alignment slider values after changing the alignment slider gains on Sept. 30th, but found them at the old values in SDF.  I accepted the new values.  Screenshot attached.

Title:  10/05/2016, Day Shift 15:00 – 23:00 (08:00 - 16:00) All times in UTC (PT)
State of H1: IFO is unlocked – PSL is up and running; Relocking  
Outgoing Operator: N/A
 
Activity Log: All Times in UTC (PT)

14:30 (07:30) Chris – Going down X-Arm to work on beam tube sealing
15:43 (08:43) Karen – Cleaning at Mid-Y
17:16 (10:16) Karen – Finished at Mid-Y
17:21 (10:21) Kiwamu – Going into PSL Enclosure
18:18 (11:18) Kiwamu – Out of the PSL Enclosure
18:55 (11:55) Jason – Reset PSL Air-shower and environmental controls
19:05 (12:05) Jason – Out of the LVEA
20:07 (13:07) Bubba – Going to Mid-X
20:40 (13:40) Bubba – Back from Mid-X   
21:18 (14:18) Robert – Going into the LVEA
22:06 (15:06) Kyle – CP3 overfill
22:56 (15:56) Dave – Restarting H1:ASC, and DAQ 
23:00 (16:00) Turn over to Travis

Title: 10/05/2016, Day Shift 15:00 – 23:00 (08:00 –16:00) All times in UTC (PT)
Support: Cheryl, Daniel, Jenne, Terra,              
Incoming Operator: Travis

Shift Detail Summary:  Put IOF in DOWN, take IMC offline, and misalign MC2 so Daniel can make measurements. After Daniel finished took IFO to DC_READOUT. Lost lock when going to HIGH_POWER a few times. After hard Lockloss, Bounce and Roll modes had rung up. After damping Bounce & Roll took IFO to NOMINAL_LOW_NOISE and turned over to Robert. 

PI Mode 15009Hz was ringing up; set phase to -100 and mode came down normal. 

1510 - 1525 hrs -> To and from Y-mid 

39 seconds for LN2 to appear at exhaust with LLCV bypass opened 1/2 turn.  

Next over-fill to be Friday

I found that the digital filter settings for the AC signals of PWR_EOM and PWR_IN (29876) were wrong. I set them back to the correct one, see the attached screemshot for the right settings. The SDF is updated accordingly.

In addition, when I went into the PSL enclosure in this morning, I re-aligned the beam on PWR_IN which is a PDA55 down below the periscope. The beam actually had some misalignment both in pitch and yaw. As I aligned the beam, the received power increased by 2-3%. I did not change the calibration of this PD in the digital system.

[Cheryl, JeffB, Jenne]

ITMY bounce damping phase was bad again.  In the end, the phase that we were using before 21Sept is once again correct.  I'm going to put this in the guardian, but we may want to start looking at if our beam spots are moving around in some way that is making this happen. 

See Stefan's alog 30140 for a summary of previous work on this.

J. Kissel

While attempting to verify the success of Fil's work with the ETMY UIM / L1 monitor signals yesterday (LHO aLOG 30231), I noticed that the NOISEMON channels were white on the 
/opt/rtcds/userapps/release/sus/common/medm/quad/SUS_CUST_QUAD_MONITOR_OVERVIEW.adl
After some detective work, I realized it was because of the upgrade of these NOISEMON and FASTIMON channels to full filter bank status (ECR E1600033, and LHO aLOG 25329). During that upgrade, we never took the time to update the MEDM screens. 

This is indeed true of most of the SUS (QUADs, BSFM, HLTS, HSTS, TMTS, and OMCS), since all NOISEMONs and FASTIMONs have been similarly upgraded.

As such, I've quickly fixed the bug in all of the following MEDM screens:
/opt/rtcds/userapps/release/sus/common/medm/quad/SUS_CUST_QUAD_MONITOR_OVERVIEW.adl
/opt/rtcds/userapps/release/sus/common/medm/bsfm/SUS_CUST_BSFM_MONITOR_OVERVIEW.adl
/opt/rtcds/userapps/release/sus/common/medm/hxts/SUS_CUST_HXTS_MONITOR_OVERVIEW.adl
/opt/rtcds/userapps/release/sus/common/medm/tmts/SUS_CUST_TMTS_MONITOR_OVERVIEW.adl
/opt/rtcds/userapps/release/sus/common/medm/omcs/SUS_CUST_OMCS_MONITOR_OVERVIEW.adl

and committed them to the svn repo. LLO need only svn up these directories to receive the bug fix.

Keita Robert Daniel

We misaligned MC2 and made a jitter measurement using the DC readouts of the two wavefront sensors in reflection of MC1. The PSL power was close to 2 W. The top panel of the first attached plot shows the jitter and displacement spectra in units of divergence angle and beam size, respectively. The bottom panel shows the spectra measured by the QPDs of the PSL diagnostics breadboard in arbitrary units. The calibration for these QPDs is not clear at the moment.

The second plot shows coherence spectra between the QPDs of the PSL diagnostics breadboard and the wavefront sensors.

Some observations:

• The jitter below 100 Hz seems to come mostly from the PSL HPO—even after the attenuation provided by the PMC. This rise towards lower frequencies was not present in O1.
• The slope of the uncalibrated PSL QPD spectra differs above 100 Hz from the pointing noise reported by the automated procedure of the diagnostics breadboard. The uncalibrated QPD spectra are a lot flatter in this frequency region. The flatter spectra do a better job explaining the coherence of the 240 and 450 Hz peaks with the wavefront sensor.
• Since we see the coherence of the HPO peaks with the wavefront sensors, its difficult to see that the 1Q spectra (which doesn't show the peaks) can be five times higher than the 2Q spectra.
• The calibration of the PSL QPD spectra can be estimated from the coherence with the wavefront sensor spectrum. For 2Q the calibration factor should be around 60 x 10^–5, and maybe 10 x 10^–5 for 1Q. The attenuation factor of the PMC is around 60.

MC2 misalign was putting +300 counts on MC2 yaw through the test channel offset.  Today when JeffB set the IMC to offline, the IMC was still flashihing.  I put an offset of -1000 into the alignment slider, which is -2232 counts after the gain, which did misalign MC2 enough to stop all IMC flashing.

The total offset was +300-2232 = -1932.   I tested the offset before relocking the IMC, and -1000 stops all flashing, -800 sowed signs of some small increase in light on MC2 Trans, and -600 clearly shows IMC flashes, so I set the offset at -1000.

I ran this by JeffK and updated the TEST offset used to misalign MC2 to -1000, and updated SDF.

The laser power is noticeably lower since the beginning of last week.  I increased the diode currents by
0.3A and adjusted the diode temperatures.

diode currents were 50.2A, now 50.5A
diode box 1: no change
diode box 2: reduced temperature from 23 to 21.5 degC
diode box 3: reduced temperature from 23 to 22.5 degC
diode box 4: no change

Laser power went from 158.2W to 166.3W as reported by the power monitor on the MEDM laser screen.

While Daniel, Sheila and I were looking at some jitter signals, we noticed that the SUM channels that are used to normalize the DC QPDs do not have any lowpassing!!  The transmon QPDs already had these more modern parts, but they were never back-propagated to the ASC model. 

Also, while the trans QPDs had the right model parts, there aren't actually any lowpasses installed in the filter banks.  We'll want to give ourselves ~1Hz cutoffs to eliminate all the high frequency junk, while still allowing the normalization to use the overall power on the QPDs.

I have now done replaced the old QPD parts with the new ones in the ASC model, and successfully compiled the ASC model.  It has not yet been installed / restarted.

I'm almost done making the new screens, and should be done with another ~30 min of work tomorrow.

To be consistent with the transmon QPDs, rather than saving the _SUM channels, we will now be saving the _NSUM_OUT channels.  The _SUM channels will get the lowpasses, since they are used for the actual normalization of the pitch and yaw signals, so they're not what we'll want to look at for spectra and other things.  The _NSUM channels have the ability to be normalized with the PSL input power, but we are not using that capability (and haven't been with the transmon QPDs either), so really they're just the sum, with no lowpass.

The affected QPDs are:

REFL_A_DC, REFL_B_DC, AS_A_DC, AS_B_DC, POP_A, POP_B, AS_C, OMC_A, OMC_B, OMCR_A, OMCR_B, AS_D_DC(even though we don't use this last one).