Displaying reports 56401-56420 of 85796.Go to page Start 2817 2818 2819 2820 2821 2822 2823 2824 2825 End
Reports until 18:47, Tuesday 04 October 2016
H1 ISC
keita.kawabe@LIGO.ORG - posted 18:47, Tuesday 04 October 2016 (30221)
coherence between HPO DBB signal and DARM at 46W

This is more like a preview.

Top red is DELTAL_EXTERNAL (not anti-whitened) multiplied by 2E6 to make it easier to compare the features with DBB QPDs measuring the HPO beam. Bottom is the coherence between DARM, jitter, and intensity noise measured by DBB QPDs.

As was expected a huge coherence peak is at 1kHz, but the coherence between DARM and 1QY (QPD1, PIT) is pretty high from 200 to 1kHz and at around 4.2kHz.

QPD signals look somewhat different from usual DBB scan plots (e.g. this one) in that 10-1000Hz slope is steeper in DBB scans.

It would be useful to measure coherence between DBB and various QPDs and ASC sensors (and it would be good if we can do it without going to the floor).

There's a caveat.

Jason and Peter taught me that DBB shutters could be manually opened using DBB crate front panel switches (it cannot be done via MEDM), so I went to the rack and opened the HPO DBB shutter while the IFO was locked in DC at 46W but not yet in nominal low noise (still lownoise ASC). That was a good part.

However, with manual mode, I didn't know if I can lock DBB PMC or keep it off-resonance and how, so all that was available to me was the QPD signals from the beam reflected by the DBB PMC which might or might not have been totally off-resonant.

I think it's a high priority to make DBB fully operatable.

Images attached to this report
H1 CAL (CAL, CDS)
darkhan.tuyenbayev@LIGO.ORG - posted 18:15, Tuesday 04 October 2016 (30220)
An issue with fixed phase oscillator code

Dave B, Joe B, Jeff K, Darkhan T,

Overview

It was discovered that a signal generated by a FixedPhaseOsc part, which is currently present in SUS-(E|I)TM(X|Y), CAL-CS, CAL-PCAL(X|Y) and some PI front-end models, is not guaranteed to have a fixed phase at GPS time 0 after a model containing the part is restarted.

See details for a suggested bug fix.

Before the bug is fixed in the code, one must update the frequency of an oscillator to some non-nominal value, say 0 Hz, and then set it back to its nominal value every time after a model with an fixed-phase oscillator is restarted. This operation should synchronize the phase of the oscillator to be 0 degrees at GPS time 0.

We restarted all of the oscillators in the SUS-ETMY, CAL-CS and CAL-PCAL(X|Y) models (cal. lines) after the issue was discovered.

Details

The FixedPhaseOsc part is expected to generate a periodically oscillating output with a requested frequency and a phase that would be 0 degrees if measured at GPS time 0. However, recent investigations revealed that the phase of a signal from FixedPhaseOsc was rather random every time a model is restarted (related alogs: 29992, 30197). We found that when a model is restarted, a FixedPhaseOsc static variable that stores the last known requested frequency does not get initialized properly. This problem can be fixed by replacing lines 100-101 in release/src/epics/util/lib/OscFixedPhase.pm with:

my $calcExp = "\L$::xpartName[$i]_freq = 0;\n";

This correction will result in a "true" condition in line 158, leading to proper initialization of the variables in the FixedPhaseOsc code.

H1 CAL (CAL)
gregory.mendell@LIGO.ORG - posted 17:47, Tuesday 04 October 2016 (30219)
Calibration factors (kappas) generated from SLM data using D20160926_H1_CAL_EPICS_VALUES

G. Mendell, S. Karki, D. Tuyenbayev

Attached are plots showing the calibration factors (kappa_tst, kappa_pu, kappa_A, kappa_C and f_c)  for 26 Sept. 2016 generated from the Spectral Line Monitor (SLM)  data, analyzed using Matlab code from Sudarshan Karki and EPICS values from Darkhan Tuyenbayev found in

   D20160926_H1_CAL_EPICS_VALUES.m

in the calibration svn under,

  aligocalibration/trunk/Runs/PreER10/H1/Scripts/CAL_EPICS

The plots start at 1158913200 == Sep 26 2016 08:19:43 UTC

A full set of plots can be found by going here,

https://ldas-jobs.ligo-wa.caltech.edu/~gmendell/pcalmon_with_plots/daily-pcalmonNavigation.html

and clicking on the calendar in the left frame, and then any of the links to the plots in the middle frame. The plots for Sept 26, 27, and 28 have been updated using D20160926_H1_CAL_EPICS_VALUES.

(Plots and data have not shown up after Sept 28, due to a configuration problem introduced during maintenance on 27 Sept 2016. This is also now fixed and SLM should produce plots again, when we have more H1 analysis ready data.)

See also these related alogs:

https://alog.ligo-wa.caltech.edu/aLOG/index.php?callRep=29992

https://alog.ligo-wa.caltech.edu/aLOG/index.php?callRep=29184

Non-image files attached to this report
H1 PSL
peter.king@LIGO.ORG - posted 17:28, Tuesday 04 October 2016 - last comment - 08:25, Wednesday 05 October 2016(30217)
laser is up for now
The laser is gingerly up for now.  Even though it is running, it is not really fixed.
Another shake down involving the flow sensors will take place on Thursday morning.
Comments related to this report
peter.king@LIGO.ORG - 08:25, Wednesday 05 October 2016 (30230)
I forgot to mention that in checking for bubbles in the under the table crystal chiller filter, an
air bubble about 10 mm in diameter was observed.  When I accidentally dropped the filter, a beneficial
consequence was that any other air bubbles would have been dislodged.  However the volume of the
bubbles was not much more than the 10 mm bubble spotted earlier.
H1 PSL
peter.king@LIGO.ORG - posted 17:26, Tuesday 04 October 2016 (30216)
PSL diode chiller
An inquiry with Technotrans about the chiller controller yielded the information that provided the
software version the controller is running is the same, they ought to be interchangeable.  We have
always had to provide the serial number of the affected chiller in order to get a replacement
controller.

    The controller for the diode chiller (S/N 63793) was swapped with the one sitting in the
mechanical room (S/N 44806) that underwent some tests and was the chiller used before.  The
chiller started up okay.  No oscillations were observed in the chiller output temperature.





Jeff/Jason/Peter
LHO VE
kyle.ryan@LIGO.ORG - posted 17:20, Tuesday 04 October 2016 - last comment - 09:19, Wednesday 05 October 2016(30215)
Finished preping X-end RGA for bake out during next extended IFO down period
Will need five days to run pumps in VEA, so likely will sit until O2a - O2b break?
Comments related to this report
chandra.romel@LIGO.ORG - 09:19, Wednesday 05 October 2016 (30234)
I hope it won't wait this long, since the break is now looking like March/April time frame. If that's the case, we should consider baking on a test stand.
H1 ISC (ISC)
jenne.driggers@LIGO.ORG - posted 17:09, Tuesday 04 October 2016 - last comment - 14:46, Wednesday 05 October 2016(30214)
Replaced QPD library blocks in ASC model with modern ones

While Daniel, Sheila and I were looking at some jitter signals, we noticed that the SUM channels that are used to normalize the DC QPDs do not have any lowpassing!!  The transmon QPDs already had these more modern parts, but they were never back-propagated to the ASC model. 

Also, while the trans QPDs had the right model parts, there aren't actually any lowpasses installed in the filter banks.  We'll want to give ourselves ~1Hz cutoffs to eliminate all the high frequency junk, while still allowing the normalization to use the overall power on the QPDs.

I have now done replaced the old QPD parts with the new ones in the ASC model, and successfully compiled the ASC model.  It has not yet been installed / restarted.

I'm almost done making the new screens, and should be done with another ~30 min of work tomorrow.

To be consistent with the transmon QPDs, rather than saving the _SUM channels, we will now be saving the _NSUM_OUT channels.  The _SUM channels will get the lowpasses, since they are used for the actual normalization of the pitch and yaw signals, so they're not what we'll want to look at for spectra and other things.  The _NSUM channels have the ability to be normalized with the PSL input power, but we are not using that capability (and haven't been with the transmon QPDs either), so really they're just the sum, with no lowpass.

The affected QPDs are:

REFL_A_DC, REFL_B_DC, AS_A_DC, AS_B_DC, POP_A, POP_B, AS_C, OMC_A, OMC_B, OMCR_A, OMCR_B, AS_D_DC(even though we don't use this last one).

Comments related to this report
jenne.driggers@LIGO.ORG - 14:46, Wednesday 05 October 2016 (30241)

Screens for this are ready.  We're waiting until next lockloss to do the install.

Screens and model are all checked into the svn.

H1 General
jeffrey.bartlett@LIGO.ORG - posted 16:09, Tuesday 04 October 2016 (30213)
Ops Day Shift Summary
Title:  10/04/2016, Day Shift 15:00 – 23:00 (08:00 - 16:00) All times in UTC (PT)
State of H1: IFO is unlocked due to ongoing laser issues. Start of maintenance day. 
Outgoing Operator: N/A
 
Activity Log: All Times in UTC (PT)

14:48 (07:48) Peter – Going to PSL electronics rack to work on PSL chiller problems
14:58 (07:48) Karen – Cleaning at End-Y 
15:00 (08:00) Chris – Escorting pest service down both arms and in Mids and Ends
15:06 (08:06) Ace Service on site
15:16 (08:16) VerbalAlarm – TCSY low water message - Vern added 0.5L water (aLOG 30199)
15:20 (08:20) Peter – Out of the LVEA
15:21 (08:21) Joe – Going into the LVEA to check batteries
15:42 (08:42) Centas on site to service matts 
15:43 (08:43) Hugh & Filiberto – Going to End-Y (WP #6211)
15:53 (08:53) Marc & Ed – In CER to replace power supplies (WP #6212)
15:55 (08:55) Chandra & Bubba – Crane work in LVEA (WP #6205)
16:23 (09:23) Kyle – Going to End-X for RGA work
16:25 (09:25) Set End-X to No BRS
16:32 (09;32) Betsy – Going into the LVEA for 3IFO
16:37 (09:37) Joe – Out of the LVEA
16:38 (09:38) Betsy – Out of the LVEA
16:42 (09:42) Coke Vending on site
16:45 (09:45) Norco - On site N2 delivery to CP1 
16:55 (09:55) Betsy – In LVEA to work on TCS-Y – Shutdown laser & Chiller work
17:03 (10:03) Karen – Finished at End-Y
17:05 (10:05) Peter & Jason – In the PSL Enclosure to check cabling
17:24 (10:24) Karen – Cleaning in LVEA near HAM5/6 to High Bay
17:40 (10:40) Pest service finished and leaving site
17:50 (10:50) Jason & Peter – Out of the PSL Enclosure
17:52 (10:52) Joe – Into LVEA to service eye wash stations
17:56 (10:56) Filiberto – Laying power cables in Biergarten
17:59 (10:59) Hugh – Finished with weekly HEPI checks
18:02 (11:02) Gerardo – Going to both end stations to check cabling
18:07 (11:07) Bubba – Out of LVEA – Finished with crane work
18:10 (11:10) Chandra – Out of the LVEA – Finished with crane work
18:14 (11:14) Norco – Leaving the site
18:18 (11:18) Joe – Out of the LVEA
18:28 (11:28) Karen – Out of LVEA – Opening the OSB receiving rollup door to remove trash
18:41 (11:41) Betsy – Going to both Mids for 3IFO stuff
18:59 (11:59) Sheila – Going into LVEA to turn on HAM2 illuminator
19:08 (12:08) Gerardo – Back from End Stations
19:09 (12:09) Kyle – Back from End-Y  
19:09 (12:09) Marc & Ed – Out of CER
19:10 (12:10) Karen – Out of the LVEA
19:12 (12:12) Sheila – Out of the LVEA
19:12 (12:12) Filiberto – Out of the LVEA
19:45 (12:45) Sheila – Going into LVEA to turn off illuminator at HAM2
19:56 (12:56) Betsy – Back from the Mid Stations
20:14 (13:14) Marc – Going to Mid-Y to get electrical parts
20:38 (13:38) Betsy – Going into the LVEA to turn on TCS-Y CO2 laser
20:50 (13:50) Betsy – Out of the LVEA
20:52 (13:52) Marc – Back from Mid-Y
20:57 (13:57) Keita – Going to PSL rack to check DBB shutter voltages
21:30 (14:30) Peter – Going into PSL Enclosure to dress up the PMC alignment
21:57 (14:57) Daniel – Going into LVEA 
22:03 (15:03) Fred – Going into the LVEA for 3IFO
22:15 (15:15) Daniel – Out of the LVEA
22:21 (15:21) Kyle – going to West Bay to retrieve tools and parts  
22:27 (15:27) Kyle – Out of the LVEA
22:38 (15:38) Peter – Out of the PSL Enclosure
22:40 (15:40) Keita – Out of the LVEA
22:45 (15:45) Fred – Out of the LVEA
23:00 (16:00) Turn over to Travis


Title: 10/04/2016, Day Shift 15:00 – 23:00 (08:00 –16:00) All times in UTC (PT)
Support: Peter, Jason,          
Incoming Operator: Travis

Shift Detail Summary: IFO has been down all shift due to laser problems and maintenance window. PSL team swapped an apparently faulty Diode chiller controller with the controller from the backup chiller. PSL has been up for almost 2 hours. Peter tweaked the alignment of the PMC. Starting an initial alignment     	 
H1 CAL
aaron.viets@LIGO.ORG - posted 14:27, Tuesday 04 October 2016 (30210)
New LHO filters with corrected ESD line frequency
With the previous filters file at LHO, the GDS pipeline was not computing correct values for the kappas. As pointed out by Darkhan, the ESD line frequency at LHO was changed on Aug 24, 2016. The value used in aligocalibration/trunk/Runs/O2/TDfilter/create_partial_td_filters.m was updated accordingly, and the new filters file computes the kappas as expected. The new filters file can be found in the calibration SVN:

aligocalibration/trunk/Runs/PreER10/GDSFilters/H1GDS_1159648300.npz

These filters were made using revision #3400 of the calibration SVN.

Several plots are attached: 
A plot of the h(t) spectrum calibrated using this filters file and the output of the front-end CALCS model
CALCS vs. GDS residual plot
Plots of the control correction filter and the residual correction filter
Images attached to this report
Non-image files attached to this report
H1 SEI (SEI)
cheryl.vorvick@LIGO.ORG - posted 13:59, Tuesday 04 October 2016 (30209)
SEI seismometer mass check

Some T240 proof masses are out of range:

All others are within range.

All STS proof masses are within a healthy range.

Details attached.
 

Non-image files attached to this report
H1 CDS (DAQ)
david.barker@LIGO.ORG - posted 13:30, Tuesday 04 October 2016 (30208)
CDS model and DAQ restart report, Friday 30th September, Saturday, Sunday, Monday 1st, 2nd, 3rd October 2016

model restarts logged for Mon 03/Oct/2016
2016_10_03 09:23 h1ioplsc0
2016_10_03 09:23 h1lsc
2016_10_03 09:23 h1omc
2016_10_03 09:24 h1ioplsc0
2016_10_03 09:24 h1lscaux
2016_10_03 09:24 h1lsc
2016_10_03 09:24 h1omc
2016_10_03 09:24 h1omcpi

h1lsc0 restart to fix power switch on IO Chassis in CER.

model restarts logged for Sun 02/Oct/2016 None reported

model restarts logged for Sat 01/Oct/2016 None reported

model restarts logged for Fri 30/Sep/2016

Site power outage at 06:08PDT, all machines rebooted between that time and 08:30.

2016_09_30 13:58 h1fw2

upgrade daqd code for minor bug fix found at llo.

H1 CDS (SEI)
filiberto.clara@LIGO.ORG - posted 12:52, Tuesday 04 October 2016 (30207)
EndY STS2 Mass Centering via Binary Output Fixed

Fault Report 4683
WP 6211

One of the binary cards inside IO Chassis SEIEY was replaced this morning. This was to fix the remote auto-zero function for the STS-2 chassis. Hugh did a functionality check for the binary input/outputs for associated card. The h1seiey IO chassis and front end computer were restarted.

J. Batch, F. Clara, H. Radkins

H1 CDS (DAQ)
james.batch@LIGO.ORG - posted 11:17, Tuesday 04 October 2016 (30205)
Add more memory to h1nds0, again.
WP 6214

Dave, Jim, Jamie

Added 24G of RAM to h1nds0 to bring a total of 72GB.  Increased daqd's memory buffer usage in the daqdrc from 50 to 100. Jamie tested his application that collects recent data, which now works properly.

This was actually done in two steps, the first try installed a total of 96GB.  We determined that was far more than was needed, so we backed that out to a total of 72GB, made up of 3-16GB DIMM in the first bank, 3-8GB DIMM in the second bank.
H1 AOS
madeline.wade@LIGO.ORG - posted 10:26, Tuesday 04 October 2016 (30202)
Restart of GDS calibration pipeline with gstlal-calibration-1.0.3 package

The LHO DMT machines were updated today with the gstlal-calibration-1.0.3 package.  The GDS pipeline was restrated to work from this package at 1159637032. 

H1 TCS (TCS)
vernon.sandberg@LIGO.ORG - posted 08:43, Tuesday 04 October 2016 - last comment - 14:31, Tuesday 04 October 2016(30199)
TCS Chiller Status and Fill Report

TCS-X: Full, level at 29.0, 3.7 gpm, 20.5 deg. C

TCS-Y: found water level at 4.3, added 500 mL water, raised water level to 8.7, 4.0 gpm, 20.3 deg. C

Comments related to this report
betsy.weaver@LIGO.ORG - 10:15, Tuesday 04 October 2016 (30201)

I have keyed off the TCSY laser in order to check the chiller reservoir further.

betsy.weaver@LIGO.ORG - 14:31, Tuesday 04 October 2016 (30211)

I turned the TCSY laser back on.  Not much more to say on the chiller story - we're still adding a little water every day.  I'll let another few days go and trend fill data to see if we're tapering off.

H1 CAL (CAL)
darkhan.tuyenbayev@LIGO.ORG - posted 01:52, Tuesday 04 October 2016 - last comment - 10:38, Tuesday 04 October 2016(30197)
Front-end kappas from Sept 27 locks

Time-dependent parameter ("kappas") trends calculated from two lock stretches on September are attached to this report.

It seems that the front-end produced fairly smooth kappas several hours after the most recent update of the front-end setttings (LHO alog 29992). See figures 1 and 2.

However, from later lock stretches on September 30 (after the Tuesday activites), it looks like the synchronized oscillators for SUS line were synched with an incorrect phase of 143.6 degress w.r.t. each other (see KAPPA_TST values in Fig. 3 and TF phase in Fig. 4). A similar issue was reported in the previous report (LHO alog 29992). I was able to fix the problem for this particular line by resetting the line frequency to 0 Hz (turning off the line) in the SUS-ETMY model and then setting it back to its nominal state 35.9 Hz (see Fig. 5). We probably need to check "FIXED_PHASE_OSC_WITH_CONTROL.c" for bugs.

Images attached to this report
Comments related to this report
jeffrey.kissel@LIGO.ORG - 10:38, Tuesday 04 October 2016 (30203)CDS
Tagging CDS so they can help fix the bug!
H1 ISC
daniel.sigg@LIGO.ORG - posted 17:04, Friday 30 September 2016 - last comment - 11:26, Tuesday 04 October 2016(30119)
Jitter into the IMC

This is a plot of the jitter measured by the IMC WFS DC PIT/YAW sensors during last nights lock. The 280 Hz periscope peak reaches about 1x10-4/√Hz in relative pointing noise, or about 3x10-4 rms. The relative pointing noise out of the HPO is about 2x10-5/√Hz at 300 Hz. After the attenuation through the PMC this would correspond to a level below 10-6/√Hz. The jitter peaks show up in DARM, if they are high enough. This is clearly visible in the coherence spectra.

The ISS second loop control signal is an indication of the intensity noise after the mode cleaner with only the first loop on. The flat noise level above 200 Hz is around 3x10-6/√Hz in RIN, with peaks around 240 Hz, 430 Hz, 580 Hz and 700 Hz. Comparing this to the free-running noise in alog 29778 shows this RIN level at 10^-5/√Hz. We can also compare this with the DBB measurements, such as in alog 29754: the intensity noise after the HPO shows a 1/f behaviour and no peaks. Looking at the numbers it explains the noise below 300 Hz. It looks like a flat noise at the 10^-5 level including the above peaks gets added to the free-running intensity noise after the PMC. The peaks in the controls signal of the second loop ISS line up with peaks visible in the pointing noise. But, neither the numbers nor the spectral shape matches. These peaks have coherence with DARM.

Non-image files attached to this report
Comments related to this report
daniel.sigg@LIGO.ORG - 10:30, Monday 03 October 2016 (30169)

Checking the calibration of the WFS DC readouts I noticed a calibration error of a factor of 0.065. So, all angles measured by the WFSs should be scaled by this number. This still makes the jitter after the PMC dominant, but one might expect to see some of the HPO jitter peak show through in places where the downstream jitter has a valley. In any case, we should repeat the PSL jitter measurement with the IMC unlocked.

Non-image files attached to this comment
daniel.sigg@LIGO.ORG - 11:26, Tuesday 04 October 2016 (30206)

A report of the measured beam jitter at LLO is available in T1300368.

An earlier measurement at LHO is reported in alog 21212. Using an IMC divergence angle of 1.6x10–4 rad, the periscope peak at 280 Hz is around 10^-4/√Hz. This is closer to the first posted spectrum with the "wrong" calibration. Here I post this spectrum again and add the dbb measurement of the jitter out of the HPO propagated through the PMC (1.6%), but scaled by a fudge factor of 2. The Sep 11, 2015, spectrum shows a more or less flat noise level below 80 Hz, whereas the recent spectrum shows 1/f noise. The HPO spectrum also shows as 1/f dependency and is within a factor of 2 of the first posted spectrum. If jitter into the IMC is the main coupling mechanism into DARM, the HPO jitter peaks above 400 Hz are well below the PSL table jitter after the PMC and the would not show up in the DARM spectrum.

Non-image files attached to this comment
H1 CAL (CAL)
darkhan.tuyenbayev@LIGO.ORG - posted 00:51, Tuesday 27 September 2016 - last comment - 10:38, Tuesday 04 October 2016(29992)
Front-end kappa calculation settings

Kiwamu, Sudarshan, Jenne, Darkhan

Overview

EPICS records that are used for calculating DARM time-dependent parameters ("kappas"), were updated using corrected DARM model (with the correct sign of the ETMY_L3_DRIVEALIGN_L2L gain). These EPICS values result in reasonable kappa values (see details).

"512 Hz DAQ downsampling" filter was installed into CAL-CS synched oscillator that replicates 35.9 Hz cal. line (ESD).

Investigations showed that the synched oscillators for 35.9 Hz cal. line were running at 180 degrees out of phase w.r.t. each other. They got synched to the same phase after I played some with the oscillator settings in CAL-CS model.

Jenne noticed that today fC was oscillating between 320 and 360 Hz at the time-scale of ~20s. This issue was resolved by turning on low-pass filters in the CAL-CS model.

Details

Sudarshan confirmed that kappas calculated from SLM tool data using these EPICS values are within reasonable ranges. After updating EPICS records one of the issues was that κTST calculated in the front-end was around -1.0. Further investigations showed that the synched oscillators for 35.9 Hz cal. line in SUS-ETMY and CAL-CS models were running at 180 degrees out of phase w.r.t. each other. We could get rid of the discrepancy by setting the phase of the CAL-CS oscillator to 180 degrees (see attached plot).

After changing settings on the synchronized oscillators their phases somehow got synchronized. So, I removed 180 degrees of an additional phase in the CAL-CS oscillator. It is still not clear what was the cause for the phase of two synched oscillators being exactly 180 degrees off. Now the oscillator outputs (after the 512 Hz DAQ downsampling) are pretty much the same (TF measurement at 35.9 Hz is attached).

New EPICS values and corresponding logs were commited to calibration SVN. The values were accepted in SDF_OVERVIEW.

Images attached to this report
Non-image files attached to this report
Comments related to this report
jeffrey.kissel@LIGO.ORG - 10:38, Tuesday 04 October 2016 (30204)CDS
Tagging CDS so they can help address the bug in the synchronized oscillators!
H1 SUS (SUS)
marc.pirello@LIGO.ORG - posted 17:01, Monday 08 August 2016 - last comment - 14:33, Tuesday 04 October 2016(28939)
PI Correction in HV for ETM ESD Driver - Function Analysis

ECR E1600230-v1

WP 6053

We analyzed the transfer function through the ETM ESD Driver before and after the capacitor and TVS were applied (see ECR).  Using the Dynamic Signal Analyzer (SR785) set to sweep from 1kHz to 100kHz at 1000mV, the driver performs as expected when the waveform is applied to the PI input.  I have attached a plot of the transfer function displaying modified HV, modified LV, and pre-mod HV values.

Images attached to this report
Non-image files attached to this report
Comments related to this report
jeffrey.kissel@LIGO.ORG - 14:33, Tuesday 04 October 2016 (30212)CAL, CDS
For future reference, this transfer function was taken from the differential PI input (pins 1/9 or 2/10 of the DB15 connector on the bottom of pg 1 in D1500016) on the front of the chassis to the BNC output inside the chassis itself (P5, P6, P9, or P10 in the middle of pg 1 in D1500016).

The AC gain of this path is nominally 2.0, or +6 dB (G = 1 + R28/R30 on pg 6 of D1500016), but what mark shows here is that the gain changes by ~2 dB when the high voltage path is engaged.

Also, the capacitor is 1 [nF] as quoted from the ECR. However, given the components surrounding this cap, I can't really figure out why the pole frequency is at 10 kHz. The input impedance to the relay (pg 8 of D1500016) is 200 [Ohm] from the summing node (pg 9 of D1500016). Thus, I would guess that the pole frequency would be at 1/(2 * pi * 200 [Ohm] * 1e-9 [F]) = 0.79 [MHz], not 10 [kHz]. One would need a resistance of ~15 [kOhm] to bring the pole frequency down to 1/(2 * pi * 1.5e4 [Ohm] * 1e-9 [F]) = 10.6 [kHz]. Because the pole frequency doesn't change, regardless of the relay state, it implies some other resistance to ground some where...

Eh well. Measurements don't lie -- 10 [kHz] it is!
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