(jim nic)

We've implemented the ISI CPS -> MICH feedforward (MICH freeze). It was a fairly simple process:

We installed the feedforward coefficients that Ryan suggests in his writeup. These could be re-measured to potentially improve the subtraction.

Then we compared the spectrum of the feedfoward signal and the MICH control signal. We saw a relative gain of 188, so this was added to a filter bank in the feedforward path.

We added a 50Hz low pass to the feedforward path so we aren't injecting too much noise.

When the feedforward path is enabled, we have a reduction in the MICH control signal RMS by a factor of 2-3. See attached figure (reference traces are with FF turned off).

The CPS has a 9Hz feature. Jim says it's from HEPI. This is injected into the MICH control signal, but the change to the RMS is insignificant.

Also attached is the settings of the MEDM screens. Several of these are 'hidden' because they have only been autogenerated and not added to the main screens.

Finally, the easy way to turn on and off the feedforward is by setting the channel H1:LSC-CPSFF_GAIN to 0 (off) or 1 (on). It has a 10 second ramp.

Dave, Daniel

All Timing IRIG-B Modules at LHO are now currently showing the correct number of leap seconds: 17

The leap second was added automatically at 23:59:59 UTC on June 30th, 2015 using the leap second functionality on the IRIG-B.

Patched ldas-tools-1.19.32 with new leap second data, rebuilt and installed in /opt/rtapps.  Built new versions of daqd for the frame writers, NDS, broadcaster, and data concentrator.  Restarted data concentrator to get new daqd running on the DAQ.  Frames are being written with the correct value for leap seconds.

Jun 30 16:59:59 h1conlog1-master kernel: [12118377.100031] Clock: inserting leap second 23:59:60 UTC
Jun 30 17:00:11 h1conlog1-master conlog: ../conlog.cpp: 301: process_cac_messages: MySQL Exception: Error: Duplicate entry 'H1:ASC-ODC_CHANNEL_OUTMON-1435708800004681820-3' for key 'PRIMARY': Error code: 1062: SQLState: 23000: Exiting.
Jun 30 17:00:12 h1conlog1-master conlog: ../conlog.cpp: 331: process_cas: Exception: boost: mutex lock failed in pthread_mutex_lock: Invalid argument Exiting.

Kyle, Gerardo 

Connected LD to HAM6 annulus aux. cart (in parallel i.e. "split" flow) and sprayed audible flow of helium around entire periphery of East and South door outer O-rings pausing for 5 seconds at each leak check slot -> no LD response -> Began pumping HAM6 

Also, backed X-end turbo with LD (LD only, scroll removed) and sprayed new, untested, conflats at X-end with 20 seconds of audible helium flow - OK -> resumed backing turbo with scroll pump

I repeated the charge measurements on both ETMX and ETMY. Plots are attached.

LVEA: Laser Hazard
Observation Bit: Commissioning 

07:30 Karen – Restocking garb at end stations 
07:30 Jodi – In LVEA for 3IFO and property management work
07:55 Sprauge on site to check traps – Joe D will escort
08:00 S&K Electronics – Installing conduit in X-Arm near end station
08:20 Jodi – Out of the LVEA
08:22 Patrick – Setting up test equipment for Beckhoff vacuum testing
08:25 Gerardo – Vacuum survey in LVEA
08:32 Bubba – Going to Mid-X looking at the grout
08:35 Richard – Going into LVEA for Beckhoff vacuum testing
08:39 Karen – Back from the end stations
08:40 Christina & Karen – Going into the LVEA
08:41 Gerardo – Out of the LVEA
09:02 Katie – In the LVEA checking Magnetometers
09:05 Kyle – Going to End-X
09:22 Jim – Working on HAM3 
09:26 Bubba – Back from Mid-X
09:27 Bubba – Going into fan room in the mechanical building
09:45 Jeff K. – Going into the CER
10:15 Richard & Patrick – Out of LVEA finished with test 
10:23 Jordan – In LVEA installing PEM antennas
10:56 Dave & Jim – Installing 18 bit DAC cards at HAM5 & HAM6
11:00 Rick & Jason – Going into PSL enclosure to look for replacement optics
11:13 Filiberto – In CER to swap EtherCAT chassis
11:15 Richard – Power cycling MC2 (and other suspensions) chassis
11:26 Richard – Out of the LVEA 
11:28 Kyle & Gerardo – Going to HAM6 to setup and start pumping
11:30 Jim – Going into LVEA to swap bad 18 bit DAC card
11:32 Rick & Jason – Out of PSL Enclosure
11:49 Filiberto – Out of the LVEA
12:04 Kyle & Gerardo – Going to End-X to recover leak checker
12:43 Kyle & Gerardo – Back from end station – Going to HAM6
12:48 Kiwamu – Restart LSC frontend model
13:18 Kyle & Gerardo – Out of LVEA – HAM6 is being pumped down
13:45 Sheila – Transition LVEA to laser hazard
14:06 Kyle – Going to HAM6 
14:08 Jordan – Out of the LVEA
14:36 Greg & Nutsinee – Going into the LVEA to start TCS chillers and check tables
14:46 Patrick – Pause replication & backup on H1conlog1-replica
15:45 Greg & Nutsinee – Out of the LVEA
15:55 Dave – DAQ restart
15:59 Kyle & Gerardo – Going to HAM6

Completed logical backup of h1conlog database on h1conlog1-replica. Compressed and copied the file to /ligo/lho/data/conlog/h1/backups/h1conlog_dump_06_30_2015.sql.tgz. 6.6 GB

WP 5318

Added 97 channels. Removed 318 channels.

J. Kissel, K. Izumi, J. Betzwieser

Prior to ER7, Kiwamu and I had convinced ourselves that the delay installed in the front-end (i.e. what produces DELTAL_EXTERNAL) on the actuation path should be the difference in the known time delays on the actuation and sensing paths (see LHO aLOG 17951), and therefore entered in "1.0" to the number of clock cycles the actuation path should be delayed.

Since then, Joe reminded us that what should be installed is the sum of the known delay. See pg 11 of G1500750 for clear pictorial explanation. This sum is closest to 4.0 clock cycles.

I have now updated H1:CAL-CS_DARM_CTRL_DELAY_CYCLES (the EPICs record that dictates how much the actuation path should be delayed) to be 4.0 clock cycles, and accepted the new value in the SDF system.

NOTE Because this front-end actuation delay has been moved upstream of the application of the actuation function calibration (see LHO aLOG 19382), only DELTAL_EXTERNAL receives this delay now. In other words, DELTAL_CTRL, and DELTAL_RESIDUAL must be delayed / advanced appropriately if you want the right answer. The intent is that GDS calibration pipeline will add the appropriate, as-precise-as-we-know-it, delays to each path (apply the other super-16[kHz]-Nyquist-frequency poles/zeros), and add them together to form the more accurate GDS-CALIB_STRAIN.

Dave, Daniel, Jim

Reprogrammed the MSR IRIG-B at 12:45 PDT with Rev. 113 code (provides compatibility with the display to be used in the Control Room). Last week, Jim and I used the test stand to confirm that the flywheels in the IRIG-B PCI cards could keep stable time over a few minute interruption in the IRIG-B signal. Reprogramming took 38 seconds; the whole process of reprogramming, rebooting, resyncing, and confirming the time zone/leap seconds took 102 seconds. I had to add the leap second scheduled for later today.

MEDM screens for MSR IRIG-B are nominal. The rack-mount LED display no longer works, since Rev. 113 changes the display signal to be compatible with the display model to be used in the Control Room. Work permit 5317.

J. Kissel, J. Betzwieser, A. Mullavey, D. Macleod
Work Permit #5313

Two changes to the h1calcs front end model that I acquired from simply updating the library parts which had been modified by Joe and Duncan at LLO:
(1) In the DARM / DELTAL calibration infrastructure (i.e. the CAL_CS_MASTER.mdl library part), moved the actuation path's integer cycle time delay to "after" the actuation function, such that the delay is only applied when DELTAL_RESIDUAL and DELTAL_CTRL are summed to form DELTAL_EXTERNAL. This way, the GDS pipeline can pick up DELTAL_RESIDUAL and DELTAL_CTRL, apply the necessary corrections (namely the super-nyquist frequency poles / zeros from AA, AI, ESD Driver, and OMC whitening), and sum them together with a more accurate (i.e. not limited by integer clock cycle) delay to form GDS-CALIB_STRAIN. See LLO aLOG 18845

(2)  In the hardware injection infrastructure (i.e. the CAL_INJ_MASTER.mdl), modified the ODC bit comparator to determine whether a hardware injection is present from "is HARDWARE_OUT == 0" to "is HARDWARD_OUT <= 1e-200." Further, the status of each filter in the hardware injection path is compared against new EPICs values called "${BANKNAME}_CTRL_EQ" and "${BANKNAME}_GAIN_EQ." These values will be set (and accepted into the SDF system) by the ODC team, but this has not been done yet. See LLO aLOG 18913.

These changes also come with corresponding updates to the MEDM screen overviews for each that reflect the new organization.

Swapped EtherCAT Corner Station Chassis 6 in CER.
Old unit S1400076 was swapped with modified unit S1400077.
Modified unit had Beckhoff terminals added for EOM drivers per E1300689-v5.

Leak tested RGA joints - OK 

Also, moved X-end crane to "Parking" position at ~1010 hrs. local

Hugh and I went to HAM3 this morning to see if we could find the cause of the 23 hz line. Finding nothing at the chamber, we decided to start turning stuff off to see if we could get it to go away. Taking the ISI and HEPI down did nothing, but turning the suspension off made the line go away. I then started turning the SUS back on and as soon as I took MC2 to aligned, the 23hz peak showed up. Jeff said that it was likely the sat amplifier needed power cycled, so Hugh is filing an FRS and this is being handed off to Richard. Attached image shows HAM3 GS-13s between 20 and 30 hz. Red is from last night, when everything was on, blue is everything off, green is MC2 aligned (everything else off).  HEPI L4Cs and both SUS also saw the peak.