Displaying reports 64361-64380 of 83254.Go to page Start 3215 3216 3217 3218 3219 3220 3221 3222 3223 End
Reports until 17:03, Tuesday 30 June 2015
LHO VE
kyle.ryan@LIGO.ORG - posted 17:03, Tuesday 30 June 2015 (19393)
Vacuum activities
Kyle, Gerardo 

Connected LD to HAM6 annulus aux. cart (in parallel i.e. "split" flow) and sprayed audible flow of helium around entire periphery of East and South door outer O-rings pausing for 5 seconds at each leak check slot -> no LD response -> Began pumping HAM6 

Also, backed X-end turbo with LD (LD only, scroll removed) and sprayed new, untested, conflats at X-end with 20 seconds of audible helium flow - OK -> resumed backing turbo with scroll pump
H1 SUS
leonid.prokhorov@LIGO.ORG - posted 16:53, Tuesday 30 June 2015 (19392)
OPLEV Charge measurements
I repeated the charge measurements on both ETMX and ETMY. Plots are attached.
Images attached to this report
H1 General
jeffrey.bartlett@LIGO.ORG - posted 16:06, Tuesday 30 June 2015 (19391)
Ops Day Shift Summary
LVEA: Laser Hazard
Observation Bit: Commissioning 

07:30 Karen – Restocking garb at end stations 
07:30 Jodi – In LVEA for 3IFO and property management work
07:55 Sprauge on site to check traps – Joe D will escort
08:00 S&K Electronics – Installing conduit in X-Arm near end station
08:20 Jodi – Out of the LVEA
08:22 Patrick – Setting up test equipment for Beckhoff vacuum testing
08:25 Gerardo – Vacuum survey in LVEA
08:32 Bubba – Going to Mid-X looking at the grout
08:35 Richard – Going into LVEA for Beckhoff vacuum testing
08:39 Karen – Back from the end stations
08:40 Christina & Karen – Going into the LVEA
08:41 Gerardo – Out of the LVEA
09:02 Katie – In the LVEA checking Magnetometers
09:05 Kyle – Going to End-X
09:22 Jim – Working on HAM3 
09:26 Bubba – Back from Mid-X
09:27 Bubba – Going into fan room in the mechanical building
09:45 Jeff K. – Going into the CER
10:15 Richard & Patrick – Out of LVEA finished with test 
10:23 Jordan – In LVEA installing PEM antennas
10:56 Dave & Jim – Installing 18 bit DAC cards at HAM5 & HAM6
11:00 Rick & Jason – Going into PSL enclosure to look for replacement optics
11:13 Filiberto – In CER to swap EtherCAT chassis
11:15 Richard – Power cycling MC2 (and other suspensions) chassis
11:26 Richard – Out of the LVEA 
11:28 Kyle & Gerardo – Going to HAM6 to setup and start pumping
11:30 Jim – Going into LVEA to swap bad 18 bit DAC card
11:32 Rick & Jason – Out of PSL Enclosure
11:49 Filiberto – Out of the LVEA
12:04 Kyle & Gerardo – Going to End-X to recover leak checker
12:43 Kyle & Gerardo – Back from end station – Going to HAM6
12:48 Kiwamu – Restart LSC frontend model
13:18 Kyle & Gerardo – Out of LVEA – HAM6 is being pumped down
13:45 Sheila – Transition LVEA to laser hazard
14:06 Kyle – Going to HAM6 
14:08 Jordan – Out of the LVEA
14:36 Greg & Nutsinee – Going into the LVEA to start TCS chillers and check tables
14:46 Patrick – Pause replication & backup on H1conlog1-replica
15:45 Greg & Nutsinee – Out of the LVEA
15:55 Dave – DAQ restart
15:59 Kyle & Gerardo – Going to HAM6
H1 CDS
patrick.thomas@LIGO.ORG - posted 16:00, Tuesday 30 June 2015 (19390)
Conlog backup
Completed logical backup of h1conlog database on h1conlog1-replica. Compressed and copied the file to /ligo/lho/data/conlog/h1/backups/h1conlog_dump_06_30_2015.sql.tgz. 6.6 GB

WP 5318
H1 CDS
patrick.thomas@LIGO.ORG - posted 14:07, Tuesday 30 June 2015 (19388)
updated Conlog channel list
Added 97 channels. Removed 318 channels.
H1 CAL
jeffrey.kissel@LIGO.ORG - posted 13:52, Tuesday 30 June 2015 - last comment - 14:01, Tuesday 30 June 2015(19386)
Actuation Path Front-end Time Delay Increased (back) to 4 Clock Cycles
J. Kissel, K. Izumi, J. Betzwieser

Prior to ER7, Kiwamu and I had convinced ourselves that the delay installed in the front-end (i.e. what produces DELTAL_EXTERNAL) on the actuation path should be the difference in the known time delays on the actuation and sensing paths (see LHO aLOG 17951), and therefore entered in "1.0" to the number of clock cycles the actuation path should be delayed.

Since then, Joe reminded us that what should be installed is the sum of the known delay. See pg 11 of G1500750 for clear pictorial explanation. This sum is closest to 4.0 clock cycles.

I have now updated H1:CAL-CS_DARM_CTRL_DELAY_CYCLES (the EPICs record that dictates how much the actuation path should be delayed) to be 4.0 clock cycles, and accepted the new value in the SDF system.

NOTE Because this front-end actuation delay has been moved upstream of the application of the actuation function calibration (see LHO aLOG 19382), only DELTAL_EXTERNAL receives this delay now. In other words, DELTAL_CTRL, and DELTAL_RESIDUAL must be delayed / advanced appropriately if you want the right answer. The intent is that GDS calibration pipeline will add the appropriate, as-precise-as-we-know-it, delays to each path (apply the other super-16[kHz]-Nyquist-frequency poles/zeros), and add them together to form the more accurate GDS-CALIB_STRAIN.
Comments related to this report
jeffrey.kissel@LIGO.ORG - 14:01, Tuesday 30 June 2015 (19387)
Note, I say "back" to 4 clock cycles, because we had 4.0 clock cycles installed prior to May 12 -- see LHO aLOG 18393, which cites that we got the number originally from copying the LLO front-end calibration setup (i.e. the number Joe and Den had already correctly calculated / installed as 4.0, LLO aLOG 16421) -- Kiwamu and I just hadn't grokked why it was 4.0 until a month or two later. Hooray for science!
H1 DAQ (DAQ)
stefan.countryman@LIGO.ORG - posted 13:11, Tuesday 30 June 2015 (19384)
Reprogrammed Timing IRIG-B Module in MSR to Rev. 113
Dave, Daniel, Jim

Reprogrammed the MSR IRIG-B at 12:45 PDT with Rev. 113 code (provides compatibility with the display to be used in the Control Room). Last week, Jim and I used the test stand to confirm that the flywheels in the IRIG-B PCI cards could keep stable time over a few minute interruption in the IRIG-B signal. Reprogramming took 38 seconds; the whole process of reprogramming, rebooting, resyncing, and confirming the time zone/leap seconds took 102 seconds. I had to add the leap second scheduled for later today.

MEDM screens for MSR IRIG-B are nominal. The rack-mount LED display no longer works, since Rev. 113 changes the display signal to be compatible with the display model to be used in the Control Room. Work permit 5317.
H1 AOS
nicolas.smith@LIGO.ORG - posted 12:59, Tuesday 30 June 2015 - last comment - 17:10, Tuesday 30 June 2015(19383)
H1LSC model changes for MICH Freeze

(nicolas kiwamu jeff)

We will try to implement the MICH freeze technique soon. In order to facilitate this, we made the necessary changes to the LSC frontend model. The ISI model changes were already done by Arnaud a few weeks ago.

We have compiled, installed, and restarted the new model.

It should be noted that the new model will change some of the labeling of LSC input matrix elements. Kiwamu is aware of this and plans to update the Guardian automation code to reflect this.

The detailed changes are below:

We updated the lsc library part from the SVN which includes the new signal paths for MICH freeze feedforward.
The input terminals of the lsc library part had changed, this required shifting many signals to account for a new signal being fed into inputs 10 and 12.
We added the IPC receivers for the signals from the ISI models. These feed directly into inputs on the library model.

Comments related to this report
kiwamu.izumi@LIGO.ORG - 17:10, Tuesday 30 June 2015 (19396)

WP5319

In addition to the update of the LSC frontend model, we also updated the h1omc model in order to make it to the latest (see LLO alog 18707 for detail). In order to do so, we downloaded the lateset common omc and lscomc models from the svn and compiled h1omc with the latest common models in place. We also moved the ETM suminng junctions from the inside of the lsc block to the top level as was done in LLO. For now the ITM outputs are terminated as we do not have IPC senders for them.

As Nic mentioned above, we had to change a few guardian codes such that they are adapted to the new LSC input matrix. I edited the following codes:

  • ALIGN_IFO.py
  • ISC_DRMI.py
  • ISC_library.py

I basically replaced all the old matrix (LSC-ASPD_DOF) by the old style PD_DOF matrix in all the above three codes. We had a chance to test ALIGO_IFO and set it to the MICH_DARK state, which seems to be working fine so far. I did not get a chance to test any other states of ALIGN_IFO or the reset of the two codes yet.

H1 CAL (CAL, DetChar, INJ)
jeffrey.kissel@LIGO.ORG - posted 12:52, Tuesday 30 June 2015 (19382)
Updates to CAL-CS front-end Model
J. Kissel, J. Betzwieser, A. Mullavey, D. Macleod
Work Permit #5313

Two changes to the h1calcs front end model that I acquired from simply updating the library parts which had been modified by Joe and Duncan at LLO:
(1) In the DARM / DELTAL calibration infrastructure (i.e. the CAL_CS_MASTER.mdl library part), moved the actuation path's integer cycle time delay to "after" the actuation function, such that the delay is only applied when DELTAL_RESIDUAL and DELTAL_CTRL are summed to form DELTAL_EXTERNAL. This way, the GDS pipeline can pick up DELTAL_RESIDUAL and DELTAL_CTRL, apply the necessary corrections (namely the super-nyquist frequency poles / zeros from AA, AI, ESD Driver, and OMC whitening), and sum them together with a more accurate (i.e. not limited by integer clock cycle) delay to form GDS-CALIB_STRAIN. See LLO aLOG 18845

(2)  In the hardware injection infrastructure (i.e. the CAL_INJ_MASTER.mdl), modified the ODC bit comparator to determine whether a hardware injection is present from "is HARDWARE_OUT == 0" to "is HARDWARD_OUT <= 1e-200." Further, the status of each filter in the hardware injection path is compared against new EPICs values called "${BANKNAME}_CTRL_EQ" and "${BANKNAME}_GAIN_EQ." These values will be set (and accepted into the SDF system) by the ODC team, but this has not been done yet. See LLO aLOG 18913.

These changes also come with corresponding updates to the MEDM screen overviews for each that reflect the new organization.
H1 ISC
filiberto.clara@LIGO.ORG - posted 12:01, Tuesday 30 June 2015 - last comment - 14:19, Tuesday 30 June 2015(19381)
EtherCAT Corner Station Chassis 6
Swapped EtherCAT Corner Station Chassis 6 in CER.
Old unit S1400076 was swapped with modified unit S1400077.
Modified unit had Beckhoff terminals added for EOM drivers per E1300689-v5.
Comments related to this report
patrick.thomas@LIGO.ORG - 14:19, Tuesday 30 June 2015 (19389)
Daniel, Patrick

We updated the system manager to reflect the change. We ran into trouble with PLC2, which must have gotten new code in the restart. Daniel had to change the code for the demodulator library to prevent taking the log of a negative number.

I burtrestored to 6:10 this morning.
LHO VE
kyle.ryan@LIGO.ORG - posted 11:16, Tuesday 30 June 2015 (19380)
Ran leak detector at RGA on BSC5 between 0915-1030 hrs. local
Leak tested RGA joints - OK 

Also, moved X-end crane to "Parking" position at ~1010 hrs. local
H1 FMP
daniel.sigg@LIGO.ORG - posted 11:03, Tuesday 30 June 2015 (19379)
Pumpdown

A comparison of the end station pump down speed with the last vent.

Non-image files attached to this report
H1 SEI
jim.warner@LIGO.ORG - posted 10:35, Tuesday 30 June 2015 - last comment - 08:36, Wednesday 01 July 2015(19378)
HAM3 23hz line coming from MC2

Hugh and I went to HAM3 this morning to see if we could find the cause of the 23 hz line. Finding nothing at the chamber, we decided to start turning stuff off to see if we could get it to go away. Taking the ISI and HEPI down did nothing, but turning the suspension off made the line go away. I then started turning the SUS back on and as soon as I took MC2 to aligned, the 23hz peak showed up. Jeff said that it was likely the sat amplifier needed power cycled, so Hugh is filing an FRS and this is being handed off to Richard. Attached image shows HAM3 GS-13s between 20 and 30 hz. Red is from last night, when everything was on, blue is everything off, green is MC2 aligned (everything else off).  HEPI L4Cs and both SUS also saw the peak.

Images attached to this report
Comments related to this report
jim.warner@LIGO.ORG - 13:42, Tuesday 30 June 2015 (19385)

After all the restarts earlier and Richard power cycling MC2, the line is gone. See attached. Red trace is from 8 hours ago, blue is from a couple minutes.

Images attached to this comment
richard.mittleman@LIGO.ORG - 07:34, Wednesday 01 July 2015 (19405)

Do we know what power cycling does? how often dows this kind of thing happen?

hugh.radkins@LIGO.ORG - 08:36, Wednesday 01 July 2015 (19406)

Richard--The thought/idea is and maybe there is some way we could verify it, that the satellite amplifier goes into oscillation.

LHO General
ryan.blair@LIGO.ORG - posted 09:56, Tuesday 30 June 2015 (19377)
Internet-provider facing transceiver replaced
The LHO GC border router has had its media converter and transceivers replaced with a single transceiver to improve reliability and diagnosability, along with the matching equipment at our primary ISP.
H1 DAQ (DAQ)
stefan.countryman@LIGO.ORG - posted 09:52, Tuesday 30 June 2015 (19376)
Timing IRIG-B Module Output Consistent with DAQ Frame Names
Dave, Jonathan, Greg, Daniel

Last Tuesday (June 23rd 2015 between 12:30 and 15:50 PDT), Dave and I took a GPS time output signal from one of the rear BNC ports on a Timing IRIG-B module in EY. We temporarily fed the signal into the 16kHz rack microphone channel (see https://alog.ligo-wa.caltech.edu/aLOG/index.php?callRep=19299):

H1:PEM-EY_MIC_VEA_MINUSY_DQ

in order to record the signal in frame. Dave then found the frame file, and Jonathan extracted the first second of the H1:PEM-EY_MIC_VEA_MINUSY_DQ channel (each raw frame file has 64 seconds of data and is named according to the first second) into both text and binary formats. I then read the binary file (a bunch of 32 bit floats) using Julia, and compared the resulting array to the NDS-generated text file to confirm that the values were the same. I plotted the signal and read it twice, recording the long/short/control pulse sequence each time to make sure I'd read it correctly. I then decoded it using the IRIG-B signal spec. Finally, I compared it to the ostensible recording time, as indicated by the filename. c00010000c010000100c100000100c001001110c100000000c101001000c0

The signal as I recorded it (control = c, short = 0, long = 1) along with the decoded time; it matches the GPS time of the frame (which is 16 seconds later than the UTC time of the frame). A plot of the data is attached.

c00010000c010000100c100000100c001001110c100000000c101001000c0
 0001 000 0100 010  1000 01   0010 1110 10        1010 1000 8
 8s       22m       21h       174d                15y

Which corresponds to June 23rd, 2015 at 21:22:08 GPS time.

The GPS time (from the name of the frame, as recorded in the attached text file dump) is 1119129728.

This corresponds to Jun 23, 2015, 21:21:52, which is 16s early, as expected, due to the 16 current leap seconds.

It seems, then, that the IRIG-B Timing Module's signal isn't misaligned with the DAQ (at least not catastrophically).
Images attached to this report
H1 CDS
james.batch@LIGO.ORG - posted 09:32, Tuesday 30 June 2015 (19375)
Updated GDS tools and dataviewer for control room
The GDS tools (foton, diaggui, awggui, diag, etc) have been updated to gds-2.17.1.1 to handle conversion of UTC to GPS times for the upcoming leap second.  The leapsecs.dat file which dataviewer reads has also been updated, so dataviewer sessions started after the leap second should do the UTC to GPS conversions properly.

This change affects Ubuntu 12.04, Ubuntu 14.04, and SL6 workstations.
H1 SEI
jeffrey.bartlett@LIGO.ORG - posted 09:18, Tuesday 30 June 2015 (19374)
OPS: reset of HEPI L4C Accumulated WD Counters Tuesday 06/30/2015
Reset the accumulated WD counters for HAM2, HAM5, ETM-X, and ETM-Y
Displaying reports 64361-64380 of 83254.Go to page Start 3215 3216 3217 3218 3219 3220 3221 3222 3223 End