I have noticed that there is a mismatch between Stage-2 BSC-ISI CART2ACT basis change matrix. This is true for all the BSC-ISI chambers. The first attachment shows the designed value (https://dcc.ligo.org/DocDB/0013/T1000388/017/T1000388%20SEI%20Sensors%20Location.pdf) of CART2ACT matrix while the second and third attachments show the current matrices in ITMX (or ETMY) and ITMY (or BS/ETMX) respectively. I have cross checked that the ST2-CART2ACT matrix stored here- /ligo/svncommon/SeiSVN/seismic/BSC-ISI/Common/Basis_Change_BSC_ISI/aLIGO_BSC_ISI_BS_ITMY_ETMX.mat is in agreement with the technical document.
This was an medm error on the ST2_CART2ACT matrix. I have fixed this and commited it to the svn.
We have noticed that h1guardian0 is running slowly. It has a load average of 45, which is oversubscribed for a 12 core machine. Jamie has been contacted.
What: L2 Damp Mode Filters rung up and tripped the analog watchdog.
Where: mode 2 and mode 4, UR coil, 504.9HZ
We see some bursts of noise broadly around 200 Hz (first plot - you may need to squint a bit). I guessed that this was due to non-stationary coupling with SRCL, a la Gabriele. The second plot is a coherence spectrogram for the same five minutes. The coherence is indeed changing in bursts. The third plot is the coherence with MICH, PRC, and SRC over the same time. The coherence with MICH especially is extremely high; I think I saw that the feedforward is disabled?
Yes, we have not yet finished commissioning the MICH and SRCL feed-forward with the better recycling gain. For the sake of robustness, we've decided not to advance beyond "LOWNOISE_ESD_ETMY" to the "LSC_FF" state for the mini run.
We noticed that the violin modes were very rung up in the DARM spectrum on the wall causing a huge comb of peaks. Kissel turned off the DARM ERR DAMP filters (violin mode filters) on all 4 TMs to see if that will help. We did not toggle the intent bit - too busy trying to save the lock.
J. Kissel, M. Landry More detailed aLOGs to come, but for those watching we've now completed all the tests we plan to do today with hardware injections and calibration measurements as of ~19:45 UTC / ~12:46 PDT. The observation intent bit is on. For the record, the "nominal" guardian state is still set to be "LSC_FF," (STATE_N = 520) but we will *not* be going to that state for not, as we still believe the MICH and SRCL subtraction are unstable and/or cause non-gaussianity. Also the cut-off filters for the CHARD and DHARD ASC loops are not engaged (because those also have not been tuned for the new higher recycling gain). We are leaving it in this state (called LOWNOISE_ESD_ETMY, STATE_N = 515) for this lock stretch, even though guardian does not think it's "nominal." Thanks for your patience! For the record, the first part of this lock stretch was glitchy (as seen on the spectrum in the wall and in the time series of DARM control). We're not sure why, but we'd convinced ourselves that it did not directly correlate with our hardware injection tests. It would be interesting to know what the problem was,
Could the nominal state be temporarily changed to Low noise ESD ETMY (or whichever state the IFO is most likely to be in for the mini run)?
If the Guardian isn't reporting that it's in the nominal state, the science mode bit will remain off and downstream tools that we want to test won't automatically run.
"As you wish..." (said as Welsey to Princess Buttercup) The Guardian Nominal state for the ISC_LOCK has been temporarily changed to "LOWNOISE_ESD_ETMY" and the guardian code has been reloaded.
Since DC lock was achieved at 11:09 (after starting to try locking at 9:00 this morning), I've set the intent bit to Undisturbed. Injections are ongoing, the range isn't great and there have been earlier lock losses, but for now I think we can call an official start to the mini-run at LHO.
We see a swept sine in the data, but the intent bit seems to still be in undisturbed. I think the agreement on the detchar call is that the intent bit would be treated like science mode, with no excitations or other interventions. We also see some hardware injections, which are fine, since they will be flagged.
Andy, all: yep we had one calibration sweep in place during the first lock, apologies. From now on, we'll only allow for hardware injections when the intent bit is set.
Let us know if there is an interval you require (e.g. 2048s?) betwen injections.
Mike: I think that five minutes should be fine between CBC injections. But if there was a specific request from the CBC group, I don't want to override that.
We lost lock ~20 minutes ago. I've reset the intent bit. Looks like a rung up violin mode on ITMY. Jeff is working on damping it.
Now locked for the mini run, I've updated the susdrift mon to capture this lock alignment.
This morning I noticed that the SRM SDF rwas reporting some errors which I (nor Kissel) have seen before, see attached picture. Toggling the LOAD table and CONFIRM buttons did not clear the error. Will talk to Dave/Jim...
Posted below are the data files for the two Dry Box cabinets in the VPW. No issues were noted in the April data. Note: DB2 and DB3 are not in use at this time. Did not post data for these two cabinets.
With help from Richard McCarthy this morning, I was able to place the work platform on the stands allowing access to the BSC-1 annulus ion pump.
Seemingly the same symtom as ysterday (alog 18123). I did exactly the same recovery process. It is now back up and running.
Confirming that the two PSL trips recently noted by Kiwamu (alogs 18123 and 18132) were for the same reasons detailed in alog 18083: the diode chiller flow interlock H1:PSL-IL_DCHILFLOW is tripping for no apparent reason. Attached are trends from the trip events. Also, there was a third another trip, between the two Kiwamu noted, on 4/30/2015 at 4:19:43 UTC that was not in the alog; this trip did bring down the NPRO (as can be seen in PSLtrips2015-04-29to2015-05-01.png), but there is no indication in the log that the trip was manually reset. Evidence attached below (PSLtrips2015-04-29to2015-05-01.png and PSLtrip#22015-04-3004:19:43.png), same cause as the rest.