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Reports until 20:10, Friday 30 May 2025
H1 ISC
georgia.mansell@LIGO.ORG - posted 20:10, Friday 30 May 2025 - last comment - 20:16, Friday 30 May 2025(84680)
Evening Locking

Ibrahim, Syracuse Squad

I'm trying to guardianify as much as possible, so I edited ISC_LOCK and lscparams in these lines:

The next lock, Ibrahim drove the IFO

The next lock

Images attached to this report
Comments related to this report
craig.cahillane@LIGO.ORG - 20:16, Friday 30 May 2025 (84683)
I put the new A2L gain from 0.85 to -1.25 for CENTER in lscparams

lscparams.a2l_gains['CENTER']['P']['ITMX']

This does not seem like a great long-term idea, but it will allow us to return to our decent buildups quickly while locking this weekend.

Seems like the DHARD_P and DSOFT_P engages in POWER_25W killed our alignment loops.

ezca.switch('ASC-DHARD_P', 'FM2', 'ON')
ezca.switch('ASC-DSOFT_P', 'FM9', 'ON')

H1 CDS
david.barker@LIGO.ORG - posted 19:57, Friday 30 May 2025 (84682)
sw-osb165-msr-0 stopped working again, needed another power cycle

Same problem with the MSR GC switch at 17:36 this evening. Erik was onsite and power cycled the unit, which cleared the problem.

It had only been running 5 hours 8 minutes since the restart at lunchtime.

We will keep monitoring and we are planning on how to replace this unit.

H1 ISC (ISC)
craig.cahillane@LIGO.ORG - posted 18:15, Friday 30 May 2025 - last comment - 18:56, Friday 30 May 2025(84679)
CARM_TO_REFL glitches causing locklosses occasionally
We often have massive glitches in the PRG when we transition from CARM_TO_REFL to RESONANCE (states 409 - 410 in ISC_LOCK_STATE_N).
PNG 1 shows this.
This evening this glitch caused at least one lockloss.

I believe the problem may be from lines 2700 to 2705 in ISC_LOCK.py.

# Transition between TRXY and REFLAIR
ISC_library.intrix['REFLBIAS', 'TR_REFL9'] = 2.0  #put back from 3.0 to 2.0 on 09/10/2018
ISC_library.intrix['REFLBIAS', 'TR_CARM'] = 0.0  
ezca['LSC-PD_DOF_MTRX_TRAMP'] = 0.2
time.sleep(0.1)
ISC_library.intrix.load()


We switch between these two intrix values (from TR_CARM to TR_REFL9) in only 0.2 seconds.

I'm going to up this to a full 2 seconds, and see if these glitches go away.
Images attached to this report
Non-image files attached to this report
Comments related to this report
craig.cahillane@LIGO.ORG - 18:56, Friday 30 May 2025 (84681)
Next time through CARM_TO_REFL, we did not have a glitch.
Images attached to this comment
H1 ISC (ISC)
craig.cahillane@LIGO.ORG - posted 17:33, Friday 30 May 2025 - last comment - 18:13, Friday 30 May 2025(84676)
Small change in REFL A LF RIN during mod depth changes
Mr Todd, Craig

Sheila reminded us about measuring mode matching using intensity noise: alog 70985.

We were wondering about the assumption that the RF sidebands are small, to see if we can explain the noise lump around the arm pole at 45 Hz.

We looked at the latest mod depth up down test at around GPS 1426014687.
We compared the REFL A LF RIN noise at a nominal mod depth time,
a 9 MHz 3dB low time, 
and a 9 MHz 3dB high time.

We do tend to see a difference in the REFL A LF RIN noise between these times.
The noise seems elevated when the 9 MHz is lower.
The difference seems smaller between nominal and 9 MHz higher.
I don't believe it's from a change in the raw power on the photodiode, which went from 7.25 mW to 7.16 mW, which is around a 1.5% change in power.

Mr Todd will make a better plot of this change in noise.
Non-image files attached to this report
Comments related to this report
matthewrichard.todd@LIGO.ORG - 18:13, Friday 30 May 2025 (84678)

I'm attaching several figures here:

1. Transfer Function of Input RIN to REFL_A RIN
2. Transfer Function of Input RIN to REFL_A_9I_RIN
3.
Transfer Function of Input RIN to POP_A_RIN

^These were calculated from the ISS injections I did in March

4. ASD of LSC_REFL_A_RIN during 9MHz mod-depth changes
5.
ASD of LSC_REFL_A_RIN during 45MHz mod-depth changes

As Craig says, it seems the lowering mod-depth periods have a more dramatic effect on the RIN at REFL_A/B than the increased mod-depth. The increased mod-depth 45MHz period shows a slightly larger effect from nominal compared to the 9MHz increased mod-depth.
From our estimation of the DC power on the diodes, this is probably not a shot-noise limit thing, and is most likely something else.

Non-image files attached to this comment
LHO General
corey.gray@LIGO.ORG - posted 16:34, Friday 30 May 2025 (84665)
Fri Ops DAY Shift Summary

TITLE: 05/30 Day Shift: 1430-2330 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Planned Engineering
INCOMING OPERATOR: Ibrahim
SHIFT SUMMARY:

Work for H1 continues with H1 making it to DC Readout!  

Alignment is NOT "ready for primetime" yet.  There are issues with PRX, so one needs to do a Manual Initial Alignment and be careful around the PRC.....basically, go to PRX_LOCKED and tweak PRM to maximize ASC-AS_A_DC.  (Since I had issues with one of my alignments, I made notes for aligning next time and they are at the bottom of this entry.  Ibrahim is already working on an alignment now.)
LOG:

 

Manual Align notes with PRC Notes:

LHO General
ibrahim.abouelfettouh@LIGO.ORG - posted 16:07, Friday 30 May 2025 (84675)
OPS Eve Shift Start

TITLE: 05/30 Eve Shift: 2330-0500 UTC (1630-2200 PST), all times posted in UTC
STATE of H1: Planned Engineering
OUTGOING OPERATOR: Corey
CURRENT ENVIRONMENT:
    SEI_ENV state: CALM
    Wind: 17mph Gusts, 9mph 3min avg
    Primary useism: 0.03 μm/s
    Secondary useism: 0.11 μm/s
QUICK SUMMARY:

IFO is LOCKING at PREP_ASC_FOR_FULL_IFO

NLN alignment recovery is still ongoing as we attempt to get past the next few states, at which we have been losing lock.

It seems that IFO is not set up for a good PRC align so we have been skipping that in the initial alignment.

H1 SUS (SUS)
julia.rice@LIGO.ORG - posted 14:02, Friday 30 May 2025 (84671)
Violin damping May 30 2025

Julia, Georgia

We turned on violin damping filters during lock using the 2W Gaurdian settings.

Some problematic modes:

For ETMY mode 1, we noticed that despite using the 2W damping setting, the gain for this filter was 0.1 (rather than 0, which is the value set for the gain in the 2W setting in the VIOLIN_DAMPING.py script). Since we were ringing up the mode with -0.1, we tried setting the gain to 0.05. This successfully damped.

We looked through the VIOLIN_DAMPING.py script and found that the 2W settings were not actually being executed for any of the modes. Georgia found a possible typo in the script where an iteration is ran through "modes.key", but the list is titled "mode" (not "modes"). Georgia then edited this line of code, changing "modes.key" to "mode.key" to fix the issue. We'll confirm this the next time we attempt violin damping when lock is aquired.

Images attached to this report
H1 CDS
david.barker@LIGO.ORG - posted 13:57, Friday 30 May 2025 - last comment - 14:10, Friday 30 May 2025(84670)
GC/CDS switch went down, control room lost offset networking

Jonathan, Erik, Dave:

At 12:28 Fri 30may2025 PDT the GC/CDS switch which provides GC networking to the MSR stopped working. Visually the switch looked functional, but it was not providing network services.

Main impact on the control room was:

 . loss of GC/CDS NAT router, no offsite access; DARM FOM stopped (unable to get references), loss of teamspeak

 . loss of all VOIP phones (they were still getting POE power, but reporting no network service).

On Jonathan's suggestion we power cycled the MSR switch. After a very long startup boot (~8 minutes) all services were recovered.

Down time was 12:28 - 12:58 PDT

DARM FOM was restarted.

This switch is called sw-osb165-msr-0. It is in rack MSR-02 U40. It is a Ruckus ICX 7850-482P (48 port, POE, 2 power supplies).

Attached photos show front and rear of the switch. To power cycle, both rear power cords need to be pulled out, orange=UPS black=FAC (note they have locking brackets which need to be disengaged). Power cords are circled in the photo.

Images attached to this report
Comments related to this report
david.barker@LIGO.ORG - 14:10, Friday 30 May 2025 (84673)
H1 AOS (ISC)
craig.cahillane@LIGO.ORG - posted 12:18, Friday 30 May 2025 - last comment - 14:10, Friday 30 May 2025(84667)
Morning locking on May 30 2025
Sheila has been driving us through ENGAGE_ASC_FOR_FULL_IFO, TMS_SERVO, and ENGAGE_SOFT_LOOPS.

She closed all of the WFS-based ASC loops by hand, with CHARD at reduced gain.  We are sitting in at an alignment which is not the best buildups we've seen so far, but is stable.
The CHARD P sensing matrix is now REFL A 45 I = 1, and REFL B 45 I = 0.5.

Green references have been reset to our current alignment to hopefully make ENGAGE_ASC_FOR_FULL_IFO work automatically next time we acquire, without yanking the IFO out of lock.
Screenshot of the references posted.

Now engaging ADS loops.  This cleaned up the buildups for us a bit.
Now resetting the green references again.

Now turned on the transmon servos, which made a big difference in the green references.
So we are resetting the green references again again.

Now turned on all SOFT loops, reduced gain for PRM Pitch (ADS PIT 3).
Now resetting green references again again again.


Images attached to this report
Comments related to this report
sheila.dwyer@LIGO.ORG - 14:10, Friday 30 May 2025 (84672)

In the last lock, we were able to get to DC readout, and Georgia and Julia worked on some violin damping.  Several ASC settings were different from the guardian:

  • CHARD Y input matrix -1*REFLA 45 + 1 * REFL B 45I, CHARD P input matrix 1* REFL A 45 I + 0.5 * REFL B 45 I (these should have been multiplied by -1, so that the filter bank gain  gain can be positive, they are in guardian that way).
  • ADS PIT3 gain lower by 10dB compared to normal (turned off FM7)
  • CHARD Y gain would be 17.5, it is 3 instead and started to ring at 10.  I ran a OLG template which had poor coherence, screenshot attached. 
  • CHARD P gain would be a gain of 1.7 with +30dB of gain, instead I used a gain of 20. 
  • PRC2 loops have their nominal gain of 250, but the + 10dB filters are off.  I tried to step the PRC2 P gain upwards, 500 was fine but we lost lock when I tried 1000.

These last three are new input matrix values, so this makes sense. 

Images attached to this comment
LHO VE
david.barker@LIGO.ORG - posted 10:52, Friday 30 May 2025 (84669)
Fri CP1 Fill

Fri May 30 10:14:26 2025 INFO: Fill completed in 14min 22secs

 

Images attached to this report
H1 ISC
matthewrichard.todd@LIGO.ORG - posted 10:44, Friday 30 May 2025 - last comment - 16:21, Wednesday 04 June 2025(84668)
PRG Estimation 2025-05-30

M. Todd, C. Cahillane, S. Dwyer


I ran another estimate of the PRG, following Craig's method in alog  58327, and estimate it to be around 54.2 W/W.


I compared the TRX power to Input Power ratio during the FIND_IR state versus the PREP_ASC_FOR_FULL_IFO state, with the PRM transmission as a normalization factor.

                       TRX_POWER_FULL_IFO  /  INPUT_POWER_FULL_IFO
PRG   =    -------------------------------------------------------------------------------------
                     TRX_POWER_FIND_IR   /  (Tp  * INPUT_POWER_FIND_IR)

I've attached the quick script I've used for the interesed reader.

Non-image files attached to this report
Comments related to this report
matthewrichard.todd@LIGO.ORG - 12:25, Sunday 01 June 2025 (84700)

I reran this measurement during DARM_TO_DC_READOUT (GRD-ISC = 501, input power = 2W), comparing the input and TR-X powers during the previous FIND_IR state (GRD-ISC = 16, input power = 2W). And I got a post vent PRG of  55.6 W/W. (post-vent)

I reran this estimate for the same states, before the vent (FIND_IR = 1427488687, DARM_TO_DC_READOUT =1427490018) and got a PRG of 55.7 W/W. (pre-vent)

It's interesting that we estimate almost the exact same PRG pre and post vent, though we may be able to improve this post vent value (probably not drastically) with some ASC improvements. We wanted to get this estimate to just check that everything is in general order in HAM1 after the vent.

Non-image files attached to this comment
elenna.capote@LIGO.ORG - 16:16, Wednesday 04 June 2025 (84799)

I think our PRG channel calibration needs updating. Matt's measurement agrees with mine: that the PRG is about 54 when we are at 2 W of power. However, at 2 W it is currently reading 60, which is wrong, possibly due to slightly less power on IM4 trans. I will add a correction factor in FM4 of our "LSC_PR_GAIN" bank, 55.6/59.8 = 0.93.

matthewrichard.todd@LIGO.ORG - 16:21, Wednesday 04 June 2025 (84802)

I checked what the PRG was according to the calibration channel H1:LSC-PR_GAIN_OUT16 during the same time that I used for my measurement of the post-vent PRG (1432694134) and it is off by roughly a factor of 8%.

The calibration channel reports a PRG of roughly 59.9; I've measured it to be 55.5. We may benefit from some re-calibration.

Images attached to this comment
H1 PSL (PSL)
corey.gray@LIGO.ORG - posted 09:26, Friday 30 May 2025 (84666)
PSL Status Report (FAMIS #26419)

This is for FAMIS #26419.
Laser Status:
    NPRO output power is 1.863W
    AMP1 output power is 70.07W
    AMP2 output power is 140.4W
    NPRO watchdog is GREEN
    AMP1 watchdog is GREEN
    AMP2 watchdog is GREEN
    PDWD watchdog is GREEN

PMC:
    It has been locked 11 days, 1 hr 18 minutes
    Reflected power = 23.1W
    Transmitted power = 105.5W
    PowerSum = 128.6W

FSS:
    It has been locked for 0 days 0 hr and 5 min
    TPD[V] = 0.8038V

ISS:
    The diffracted power is around 4.0%
    Last saturation event was 0 days 0 hours and 55 minutes ago


Possible Issues:
    PMC reflected power is high

LHO General
corey.gray@LIGO.ORG - posted 07:42, Friday 30 May 2025 (84664)
Fri Ops Day Transition

TITLE: 05/30 Day Shift: 1430-2330 UTC (0730-1630 PST), all times posted in UTC
STATE of H1: Planned Engineering
OUTGOING OPERATOR: Tony
CURRENT ENVIRONMENT:
    SEI_ENV state: CALM
    Wind: 8mph Gusts, 4mph 3min avg
    Primary useism: 0.01 μm/s
    Secondary useism: 0.09 μm/s
QUICK SUMMARY:

ISC lock is in the GREEN_ARMS_MANUAL state.   H1 is listed as PLANNED ENGINEERING.

X1 DTS
joshua.freed@LIGO.ORG - posted 13:15, Thursday 29 May 2025 - last comment - 14:43, Friday 06 June 2025(84627)
SPI Double Mixer Finalization Part3

J. Freed,

Spur Problem

As discussed in part 1, the Double Mixer has good phase noise around the carrier frequency to about a 100Hz out where SPI operates, however, it also has signals every 4096Hz away from the carrier.  I had assumed that it was an issue relating to phase and amplitude mismatch on the phase delayer, but after adding attinuators to correct the missmatch, it helped, excepecially the 80Mhz + 4096Hz signal saw a ~15dB improvement. DM_Att.pdf. However, the double mixer still has large signals and the largest did not change with the addition of the attinuators.

I realize now that the problem lies with the mixers themselves as by the nature of a mixer they create spurs on the output. 

DM_Mixer.pdf Shows the output of a single mixer. Along with the expected 80MHz - 4096 Hz and 80MHz + 4096 Hz there is extra peaks which i believe is caused by the Spurs of the mixer. The largest spur is at 80Mhz + 12,288Hz. This spur is actually in phase with the main signal and is thus construtivly interfered at the power combiner. 

I do not know how to get rid of this spur as it is so close to the main carrier signal. For fun, I used a combination of Marki LC filter Design Tool and LTspice to simulate adding a filter to the end of the system to reduce the 80Mhz + 12,288Hz spur, but even an 8th order elliptical filter would only reduce the spur by ~0.04dB due to how close it is to the main signal. For fun I went to 20th order elliptic and it only reduced it by ~0.1dB. In addition, with nonstandard parts for a 20th order elliptic it got reduced by ~4dB. I am unsure of any other method to reduce the spur.


Double Mixer is a Single Sideband Mixer

I realize now that the basic design of the double mixer actually exists and is fairly common, it is called a Single Sideband Mixer (SSB mixer). Thanks to Brian, who gave me one of these mixers to test, I have something to compair the results  

DMvsIRM.pdf Shows a plot of the double mixer vs a SSB mixer. The SSB mixer is tuned to 80MHz+4096Hz as apposed to the Double Mixers 80MHz -4096Hz but comparisons can still be made. For starters, the double mixers 80Mhz+4096Hz sideband equivalent is much better in the double mixer vs the SSB. However this comes at the cost of the 80Mhz+12,288Hz sideband equivalent which is much better in the SSB. In summary, just based on this single graph, the double mixer is more likely to be better for SPI for 2 reasons. One, we have already found out that SPI would be senstive to the 80MHz+4096Hz sideband equivalent. And two, if there is a way to attinuate these spurs by filtering, the spur further away from the carrier could be more easily attinuated.


High order modes filtering

Ive already discussed that adding fliters does not help the area around 80MHz. However, it does help with higher order modes

DM_Filter.pdf Shows a plot of adding a MC80-10-4AA bandpass filter from Lark engenering that has a bandwidth of 10MHz and a center of 80MHz at different positions in the Double Mixer. The best place to put one seems to be just before the amplifier, not entirly sure if adding one is nessisary to SPI but it should be good for reduceing a possible noise source.

Non-image files attached to this report
Comments related to this report
joshua.freed@LIGO.ORG - 14:55, Friday 30 May 2025 (84674)

High-Order Mode Filtering

The MC80-10-4AA that I listed actually filters by reflections, which is not helping to remove those signals from going back into the mixer. If a filter is going to be added, something like the ZXLF-K151+ would work much better.

joshua.freed@LIGO.ORG - 14:43, Friday 06 June 2025 (84869)

I now realize a filter should be unnecessary as the AOMs are expected to have high insertion loss at frequencies not around 80Mhz, AOM-Tuneability.png, basically acting as a band-pass filter anyways. 

 

Images attached to this comment
H1 ISC
elenna.capote@LIGO.ORG - posted 16:54, Friday 13 December 2024 - last comment - 16:40, Friday 30 May 2025(81816)
Sideband PRG Calibration

Anamaria took some time with me today to help me calibrate the sideband PRGs the same way she calculated them here for Livingston (LLO:69872). This is mostly with the intention of providing calibrated data for the finesse modeling effort that can help us better understand IFO behavior during TCS changes/powering up.

Reminder: I ran a check of the carrier PRG calibration this week (81752), which is based on the IM4 trans and end transmission values, which confirms that at 2W, our PRG is about 55.

Method:

Measure the power in the PRC at DRMI lock and compare it to the power in the PRC at 2W lock. Knowing the gamma of the 9 and 45 MHz sideband, estimate how much of the input power is sideband power. Use the predicted sideband PRG from an IFO model with perfect mode matching, and scale the expected sideband power in the PRC by those PRGs. Compare this expected value to the actual PRC power, and then scale the sideband PRGs accordingly.

Data:

DRMI lock values (measured after DRMI ASC converges):

Channel Value
POP A LF INMON 12.5 ct
POPAIR RF18 151 ct
POPAIR RF90 27.25 ct
IM4 TRANS NSUM 1.98 W

2W full lock values (measured after full IFO ASC converges, including ADS):

Channel Value
POP A LF INMON 283.8 ct
POPAIR RF18 154.5 ct
POPAIR RF90 28.5 ct
IM4 TRANS NSUM 1.98 W

Other useful numbers:

Parameter Value Notes
Gamma 9 0.213 22.7 mW 9 MHz per W of input power, 62883
Gamma 45 0.275 37.8 mW 45 MHz per W of input power, 62883
PRM Transmission 0.031 https://galaxy.ligo.caltech.edu/optics/
PR2 Transmission 229 ppm https://galaxy.ligo.caltech.edu/optics/
M12 Transmission 0.054 Splitter on POP path, 63625
2W lock carrier PRG 55 Original measurement, checked again recently
PRG9 from model 119 Anamaria's Optickle model
PRG45 from model 13 Anamaria's Optickle model

The work:

At 2 W lock, POP LF INMON measures 283.8 counts (this accounts for the dark offset). With an input power of 1.98 W and a PRG of 55, this should be 109 W. So we set a scale that 283.8 ct POP diode == 109 W PRC power.

At DRMI lock, we measure 12.5 counts in the POP diode (this accounts for the dark offset), so this gives us 4.8 W PRC power in DRMI lock.

At 1.98 W input power, 44.9 mW is 9 MHz power and 74.84 mW is 45 MHz power. We multiply by the perfect mode matching sideband PRGs and get that 5.3 W should be 9 MHz and 0.972 W should be 45 MHz in DRMI lock, so a total of 6.3 W expected PRC power in DRMI.

4.8 W / 6.3 W = 0.76, so 0.76 * 119 = 90.6 and 0.76 * 13 = 9.9, so we can say that our 2W PRG9 = 91 and PRG45 = 10.

Notice that this method ties the sideband PRGs to the measured carrier PRG. The method is perhaps not so good for the 45 MHz sideband, since we know there is so much less 45 MHz power than 9 MHz power. But these values are sensible.

Why did we do it this way?

You might notice we used the POP LF inmon value instead of the POP LF out value. There is a calibration in the POP A LF filter bank labeled "to_uW", which I assume means "microwatts of power on the POP diode". We started by using this calibrated value, and putting it into Watts of PRC power using the known transmission of the M12 splitter and PR2 (LLO calibrates POP A LF into Watts in the PRC). This resulted in a lower sideband PRG, (76.7 and 8.4 respectively). However, it also predicted that the carrier PRG should be 46. The carrier PRG calibration Craig and I performed does not rely on the POP diode at all, which is good because there is enough sideband power in the PRC to confuse the measurement. So, Anamaria and I decided to trust the independent carrier PRG measurement based on the arm transmission. Furthermore, we looked at how the H1:LSC-PR_GAIN_OUT16 channel is calibrated, and noticed that it ratios the H1:LSC-POP_A_LF_INMON value with IM4 trans. This motivated us to ignore the uW calibration filter (which then motivated us to correct for the dark offset of 3.8 ct).

Comparisons to mod depth method

If you have a good enough alog memory you might know that Craig and Jennie W have done a sideband PRG calibration in the past, using the modulation depth step test such as here: 70865 and 76358. Upon further inspection of the results, I am not sure they are so good. Mainly, the 45 MHz sideband PRG that results from this test is around 27-30, which is huge. I looked at these measurements again to try to understand why the values are so different. I noticed that when Craig steps down the 45 MHz sideband, the POP A LF value actually increases. Anamaria and I think this is because with lower 45 MHz modulation, the carrier input power increases, and the high carrier PRG (compared to the 45 MHz PRG) amplifies this excess power further. I can't find anywhere in Craig's code that accounts for this. For now, I am going to trust the method described in this alog over the mod depth step method.

Channel calibration factor

These values will calibrate the POPAIR B RF18 I ERR and RF90 I ERR channels into sideband PRGs accordingly.

calibration factor = (2W sideband PRG value) / ( 2W POPAIR count value / IM4 trans)

POPAIR18 > PRG9 calibration factor = 91 / ( 154.5 / 1.98) = 1.17, and normalize by input power

POPAIR45 > PRG45 calibration factor = 10 / (28.5 / 1.98) = 0.7, and normalize by input power

Note that if you use the POPAIR B RF18/90 I NORM MON channels instead of the ERR channels, these are already normalized by input power.

Comments related to this report
craig.cahillane@LIGO.ORG - 16:40, Friday 30 May 2025 (84677)
You are right that when the 45 MHz goes down, the carrier goes up.  
That's why POP LF and the arm transmissions all rise when we lower our mod depths.
The mod depth code does account for this, otherwise it would not work at all, see Daniel's original work.
It gives an estimate that the arm powers are 100% carrier, for instance, which comes from the fact the arm transmissions rise.
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