itmx_da_gain = -99  #ezca['SUS-ITMX_L3_DRIVEALIGN_L2L_GAIN']
etmx_da_gain = ezca['SUS-ETMX_L3_DRIVEALIGN_L2L_GAIN']

ezca['SUS-ITMX_L3_DRIVEALIGN_L2L_TRAMP'] = 10
ezca['SUS-ITMX_L3_DRIVEALIGN_L2L_GAIN']=0
time.sleep(10)

ezca.get_LIGOFilter('SUS-ITMX_M0_LOCK_L').turn_off('INPUT')
ezca['SUS-ITMX_L1_LOCK_OUTSW_L'] = 0
ezca['SUS-ITMX_L2_LOCK_OUTSW_L'] = 0
ezca['SUS-ITMX_L3_LOCK_OUTSW_L'] = 1
ezca.get_LIGOFilter('SUS-ITMX_L3_DRIVEALIGN_L2L').only_on('INPUT', 'FM4', 'FM5', 'OUTPUT', 'DECIMATION') 
ezca['LSC-ARM_OUTPUT_MTRX_3_1'] = 1
# we also need to make the swap for the MICH and SRCL FF output matrix

ezca['LSC-OUTPUT_MTRX_3_10']= 1
ezca['LSC-OUTPUT_MTRX_3_11']= 1

ezca.get_LIGOFilter('SUS-ITMX_L3_ISCINF_L').only_on('INPUT', 'FM5', 'FM8','FM9', 'FM10', 'OUTPUT', 'DECIMATION') 


#make the swap half way or three quarters

ezca['SUS-ITMX_L3_DRIVEALIGN_L2L_TRAMP'] = 20
ezca['SUS-ETMX_L3_DRIVEALIGN_L2L_TRAMP'] = 20

ezca['SUS-ITMX_L3_DRIVEALIGN_L2L_GAIN']=itmx_da_gain*1
ezca['SUS-ETMX_L3_DRIVEALIGN_L2L_GAIN']=etmx_da_gain*0

#switch it back

ezca['SUS-ITMX_L3_DRIVEALIGN_L2L_GAIN']=itmx_da_gain*0
ezca['SUS-ETMX_L3_DRIVEALIGN_L2L_GAIN']=etmx_da_gain*1