%%% OLD OLD OLD %%% filter switching set to Input "Zero History" and Output "Immediately" SimAcqOFF # DESIGN ETMX_L2_COILOUTF_UL 0 zpk([11.3742],[117.3675],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 0 zpk([11.9118],[115.3799],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 0 zpk([11.6034],[119.1647],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 0 zpk([11.5558],[119.1031],1,"n") SimAcqON # DESIGN ETMX_L2_COILOUTF_UL 1 zpk([1.3262],[113.6504],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 1 zpk([1.4191],[113.8817],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 1 zpk([1.3412],[115.0913],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 1 zpk([1.3421],[115.1311],1,"n") SimLPL2 # DESIGN ETMX_L2_COILOUTF_UL 2 zpk([5.5323;22.4187],[0.4979;245.6072],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 2 zpk([5.4697;21.8761],[0.4915;240.0583],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 2 zpk([5.5514;22.1419],[0.4988;243.0059],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 2 zpk([5.5456;22.2043],[0.4989;243.4424],1,"n") AntiAcqOFF # DESIGN ETMX_L2_COILOUTF_LL 5 zpk([115.3799],[11.9118],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 5 zpk([119.1031],[11.5558],1,"n") # DESIGN ETMX_L2_COILOUTF_UL 5 zpk([117.3675],[11.3742],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 5 zpk([119.1647],[11.6034],1,"n") AntiAcqON # DESIGN ETMX_L2_COILOUTF_LL 6 zpk([113.8817],[1.4191],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 6 zpk([115.1311],[1.3421],1,"n") # DESIGN ETMX_L2_COILOUTF_UL 6 zpk([113.6504],[1.3262],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 6 zpk([119.0913],[1.3412],1,"n") AntiLP # DESIGN ETMX_L2_COILOUTF_LL 7 zpk([0.4915;240.0583],[5.4697;21.8761],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 7 zpk([0.4989;243.4424],[5.5456;22.2043],1,"n") # DESIGN ETMX_L2_COILOUTF_UL 7 zpk([0.4979;245.6072],[5.5323;22.4187],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 7 zpk([0.4988;243.0059],[5.5514;22.1419],1,"n") %%% NEW NEW NEW %%% filter switching set to Input "Always ON" and Output "Zero Crossing" SimAcqOFF # DESIGN ETMX_L2_COILOUTF_UL 0 zpk([12.1988],[113.7677],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 0 zpk([12.0350],[112.1194],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 0 zpk([12.4062],[115.6627],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 0 zpk([12.2958],[114.4550],1,"n") SimAcqON # DESIGN ETMX_L2_COILOUTF_UL 1 zpk([1.3672;6.2621;144.8179],[6.2530;76.5541;166.2772],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 1 zpk([1.3687;6.3996;143.1718],[6.3907;76.0563;165.0157],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 1 zpk([1.3825;5.3008;147.0927],[5.2921;77.3330;168.4160],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 1 zpk([1.3649;6.1991;145.6464],[6.1896;76.2953;166.4675],1,"n") SimLP # DESIGN ETMX_L2_COILOUTF_UL 2 zpk([27.7758;109.4614 ],[2.4789; 1221.2812],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 2 zpk([27.4216;106.8961 ],[2.4469; 1192.9877],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 2 zpk([27.8521;108.0965;1015.3983],[2.4843;1005.7548;1219.1481],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 2 zpk([27.8487;108.3217 ],[2.4833; 1209.5430],1,"n") AntiAcqOFF # DESIGN ETMX_L2_COILOUTF_UL 5 zpk([113.7677],[12.1988],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 5 zpk([112.1194],[12.0350],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 5 zpk([115.6627],[12.4062],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 5 zpk([114.4550],[12.2958],1,"n") AntiAcqON # DESIGN ETMX_L2_COILOUTF_UL 6 zpk([6.2530;76.5541;166.2772],[1.3672;6.2621;144.8179],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 6 zpk([6.3907;76.0563;165.0157],[1.3687;6.3996;143.1718],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 6 zpk([5.2921;77.3330;168.4160],[1.3825;5.3008;147.0927],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 6 zpk([6.1896;76.2953;166.4675],[1.3649;6.1991;145.6464],1,"n") AntiLP # DESIGN ETMX_L2_COILOUTF_UL 7 zpk([2.4789;1221.2812],[27.7758;109.4614],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 7 zpk([2.4469;1192.9877],[27.4216;106.8961],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 7 zpk([2.4843;1005.7548;1219.1481],[27.8521;108.0965;1015.3983],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 7 zpk([2.4833;1209.5430],[27.8487;108.3217],1,"n") AntiAOSEM # DESIGN ETMX_L2_COILOUTF_UL 8 zpk([127.6106;1181.4658],[122.8901;860.8395;1848.0145],1,"n") # DESIGN ETMX_L2_COILOUTF_LL 8 zpk([124.0225;1168.1422],[119.4436;857.7064;1810.7156],1,"n") # DESIGN ETMX_L2_COILOUTF_UR 8 zpk([130.2042;1177.9739],[125.2235;853.1705;1850.5268],1,"n") # DESIGN ETMX_L2_COILOUTF_LR 8 zpk([126.4236;1131.2794],[121.7390;852.4726;1737.9055],1,"n")