(pydarm-dev) louis.dartez@cdsws40: pydarm export --push INFO | searching for 'last' report... INFO | found report: 20240311T214031Z INFO | using model from report: /ligo/groups/cal/H1/reports/20240311T214031Z/pydarm_H1.ini INFO | filter file: /opt/rtcds/lho/h1/chans/H1CALCS.txt Hc: 3.3215e+06 :: 1/Hc: 3.0107e-07 Fcc: 4.4089e+02 Hz Hau: 4.6947e-08 N/A :: 7.6007e-08 N/ct Hap: 2.0483e-08 N/A :: 6.2828e-10 N/ct Hat: 3.7886e-02 N/A :: 1.1754e-12 N/ct INFO | writing filters (filter:bank | name:design string): INFO | writing CS_DARM_ERR:10 O4_Gain:zpk([], [], 3.0107e-07) WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 write /opt/rtcds/lho/h1/chans/H1CALCS.txt WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 INFO | writing CS_DARM_CFTD_ERR:10 O4_Gain:zpk([], [], 3.0107e-07) WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 write /opt/rtcds/lho/h1/chans/H1CALCS.txt WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 INFO | writing CS_DARM_ERR:9 O4_NoD2N:zpk([440.8931534880145], [7000], 1.0000e+00) WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 write /opt/rtcds/lho/h1/chans/H1CALCS.txt WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 INFO | writing CS_DARM_ANALOG_ETMX_L1:4 Npct_O4:zpk([], [], 7.6007e-08) WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 write /opt/rtcds/lho/h1/chans/H1CALCS.txt WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 INFO | writing CS_DARM_ANALOG_ETMX_L2:4 Npct_O4:zpk([], [], 6.2828e-10) WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 write /opt/rtcds/lho/h1/chans/H1CALCS.txt WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 INFO | writing CS_DARM_ANALOG_ETMX_L3:4 Npct_O4:zpk([], [], 1.1754e-12) WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 write /opt/rtcds/lho/h1/chans/H1CALCS.txt WARNING: Module CS_DARM_ANALOG_ETMX_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMX_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ETMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L1 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_ANALOG_ITMY_L2 has one ore more zeros in the right half s-plane in this section: 4 WARNING: Module CS_DARM_CTRL_DELAY has one ore more zeros in the right half s-plane in this section: 0 WARNING: Module CS_DARM_ERR_NULL has one ore more zeros in the right half s-plane in these sections: 1, 3, 8 WARNING: Module CS_DARM_FE_ETMX_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4 WARNING: Module CS_DARM_FE_ETMX_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 6, 7 WARNING: Module CS_DARM_FE_ETMX_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMX_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ETMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ETMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ETMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ETMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_DARM_FE_ITMY_L1_LOCK_L has one ore more zeros in the right half s-plane in these sections: 3, 4, 9 WARNING: Module CS_DARM_FE_ITMY_L2_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in these sections: 2, 6, 7, 9 WARNING: Module CS_DARM_FE_ITMY_L3_DRIVEALIGN_L2L has one ore more zeros in the right half s-plane in this section: 3 WARNING: Module CS_DARM_FE_ITMY_L3_LOCK_L has one ore more zeros in the right half s-plane in these sections: 0, 2, 3, 4, 5, 6, 7, 8, 9 WARNING: Module CS_SUM_MICH_BS_M1 has one ore more zeros in the right half s-plane in this section: 7 WARNING: Module CS_SUM_MICH_BS_M2 has one ore more zeros in the right half s-plane in these sections: 4, 7, 8, 9 WARNING: Module CS_SUM_PRCL_PRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7, 9 WARNING: Module CS_SUM_PRCL_PRM_M2 has one ore more zeros in the right half s-plane in these sections: 1, 5 WARNING: Module CS_SUM_PRCL_PRM_M3 has one ore more zeros in the right half s-plane in this section: 1 WARNING: Module CS_SUM_SRCL_SRM_M1 has one ore more zeros in the right half s-plane in these sections: 5, 7 INFO | EPICS records: H1:CAL-CS_TDEP_PCAL_LINE1_CORRECTION_REAL = 0.0033813819754868746 H1:CAL-CS_TDEP_PCAL_LINE1_CORRECTION_IMAG = 0.0004266013274900615 H1:CAL-CS_TDEP_PCAL_LINE1_DELTAL_PCAL_CORR_REAL = 0.003409898839890957 H1:CAL-CS_TDEP_PCAL_LINE1_DELTAL_PCAL_CORR_IMAG = 0.0003862582962028682 H1:CAL-CS_TDEP_SUS_LINE3_REF_INVA_TST_RESPRATIO_REAL = 967319916380160.0 H1:CAL-CS_TDEP_SUS_LINE3_REF_INVA_TST_RESPRATIO_IMAG = -2958732371689472.0 H1:CAL-CS_TDEP_SUS_LINE2_REF_INVA_PUM_RESPRATIO_REAL = -4.6777622692102144e+17 H1:CAL-CS_TDEP_SUS_LINE2_REF_INVA_PUM_RESPRATIO_IMAG = -1.791613309372334e+17 H1:CAL-CS_TDEP_SUS_LINE1_REF_INVA_UIM_RESPRATIO_REAL = 2.5531309396013875e+17 H1:CAL-CS_TDEP_SUS_LINE1_REF_INVA_UIM_RESPRATIO_IMAG = -1.3444232901977702e+17 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NOCAVPOLE_REAL = 3212335.25 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NOCAVPOLE_IMAG = -854230.625 H1:CAL-CS_TDEP_PCAL_LINE2_REF_D_REAL = -263125504.0 H1:CAL-CS_TDEP_PCAL_LINE2_REF_D_IMAG = -1203443712.0 H1:CAL-CS_TDEP_PCAL_LINE2_REF_A_TST_REAL = -4.713887760968324e-19 H1:CAL-CS_TDEP_PCAL_LINE2_REF_A_TST_IMAG = 6.716647120324057e-19 H1:CAL-CS_TDEP_PCAL_LINE2_REF_A_PUM_REAL = -3.723535352052198e-21 H1:CAL-CS_TDEP_PCAL_LINE2_REF_A_PUM_IMAG = 3.048098559101644e-21 H1:CAL-CS_TDEP_PCAL_LINE2_REF_A_UIM_REAL = -1.9803658827976907e-23 H1:CAL-CS_TDEP_PCAL_LINE2_REF_A_UIM_IMAG = -9.462801814506545e-23 H1:CAL-CS_TDEP_PCAL_LINE2_CORRECTION_REAL = 5.794164735561935e-06 H1:CAL-CS_TDEP_PCAL_LINE2_CORRECTION_IMAG = 1.2552064845294808e-06 H1:CAL-CS_TDEP_PCAL_LINE2_DELTAL_PCAL_CORR_REAL = 5.9175913520448375e-06 H1:CAL-CS_TDEP_PCAL_LINE2_DELTAL_PCAL_CORR_IMAG = -3.855429611121508e-07 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NOCAVPOLE_REAL = 3321317.25 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NOCAVPOLE_IMAG = -35936.5 H1:CAL-CS_TDEP_PCAL_LINE1_REF_D_REAL = 2807910144.0 H1:CAL-CS_TDEP_PCAL_LINE1_REF_D_IMAG = -1268861952.0 H1:CAL-CS_TDEP_PCAL_LINE1_REF_A_TST_REAL = -1.5509706630285213e-16 H1:CAL-CS_TDEP_PCAL_LINE1_REF_A_TST_IMAG = -2.82027216615065e-16 H1:CAL-CS_TDEP_PCAL_LINE1_REF_A_PUM_REAL = -2.2871700108790865e-16 H1:CAL-CS_TDEP_PCAL_LINE1_REF_A_PUM_IMAG = 2.7541747442050486e-16 H1:CAL-CS_TDEP_PCAL_LINE1_REF_A_UIM_REAL = 4.1095126925022466e-17 H1:CAL-CS_TDEP_PCAL_LINE1_REF_A_UIM_IMAG = 4.293218753202311e-18 H1:CAL-CS_TDEP_PCAL_LINE3_CORRECTION_REAL = 7.128747938622837e-07 H1:CAL-CS_TDEP_PCAL_LINE3_CORRECTION_IMAG = 4.4520436404127395e-07 H1:CAL-CS_TDEP_PCAL_LINE3_DELTAL_PCAL_CORR_REAL = 8.388262813241454e-07 H1:CAL-CS_TDEP_PCAL_LINE3_DELTAL_PCAL_CORR_IMAG = -1.5068786751726293e-07 H1:CAL-CS_TDEP_PCAL_LINE4_CORRECTION_REAL = 0.001655844273045659 H1:CAL-CS_TDEP_PCAL_LINE4_CORRECTION_IMAG = 0.00015613166033290327 H1:CAL-CS_TDEP_PCAL_LINE4_DELTAL_PCAL_CORR_REAL = 0.0016645996365696192 H1:CAL-CS_TDEP_PCAL_LINE4_DELTAL_PCAL_CORR_IMAG = 0.0001121567256632261 H1:CAL-CS_TDEP_PCAL_X_COMPARE_CORRECTION_REAL = -1.225311825692188e-05 H1:CAL-CS_TDEP_PCAL_X_COMPARE_CORRECTION_IMAG = -1.86640431820706e-06 H1:CAL-CS_TDEP_PCAL_Y_COMPARE_CORRECTION_REAL = 1.2244393474247772e-05 H1:CAL-CS_TDEP_PCAL_Y_COMPARE_CORRECTION_IMAG = 1.8656812699191505e-06 H1:CAL-CS_TDEP_PCAL_X_COMPARE_DELTAL_PCAL_CORR_REAL = -1.2536323993117549e-05 H1:CAL-CS_TDEP_PCAL_X_COMPARE_DELTAL_PCAL_CORR_IMAG = 6.151674369903049e-07 H1:CAL-CS_TDEP_PCAL_Y_COMPARE_DELTAL_PCAL_CORR_REAL = 1.2527324543043505e-05 H1:CAL-CS_TDEP_PCAL_Y_COMPARE_DELTAL_PCAL_CORR_IMAG = -6.151011007204943e-07 H1:CAL-CS_TDEP_PCAL_LINE5_CORRECTION_REAL = -0.00089135771850124 H1:CAL-CS_TDEP_PCAL_LINE5_CORRECTION_IMAG = -6.855875835753977e-05 H1:CAL-CS_TDEP_PCAL_LINE5_DELTAL_PCAL_CORR_REAL = -0.00089060835307464 H1:CAL-CS_TDEP_PCAL_LINE5_DELTAL_PCAL_CORR_IMAG = -3.63852632290218e-05 H1:CAL-CS_TDEP_PCAL_LINE6_CORRECTION_REAL = -0.0003463121538516134 H1:CAL-CS_TDEP_PCAL_LINE6_CORRECTION_IMAG = -2.2361738956533372e-05 H1:CAL-CS_TDEP_PCAL_LINE6_DELTAL_PCAL_CORR_REAL = -0.00034191145095974207 H1:CAL-CS_TDEP_PCAL_LINE6_DELTAL_PCAL_CORR_IMAG = -4.637266101781279e-06 H1:CAL-CS_TDEP_PCAL_LINE7_CORRECTION_REAL = -0.00016511918511241674 H1:CAL-CS_TDEP_PCAL_LINE7_CORRECTION_IMAG = -1.0773445865197573e-05 H1:CAL-CS_TDEP_PCAL_LINE7_DELTAL_PCAL_CORR_REAL = -0.00016039505135267973 H1:CAL-CS_TDEP_PCAL_LINE7_DELTAL_PCAL_CORR_IMAG = -1.081389882529038e-06 H1:CAL-CS_TDEP_PCAL_LINE8_CORRECTION_REAL = -9.560734179103747e-05 H1:CAL-CS_TDEP_PCAL_LINE8_CORRECTION_IMAG = -6.836644843133399e-06 H1:CAL-CS_TDEP_PCAL_LINE8_DELTAL_PCAL_CORR_REAL = -9.252149902749807e-05 H1:CAL-CS_TDEP_PCAL_LINE8_DELTAL_PCAL_CORR_IMAG = -2.049407385129598e-06 H1:CAL-CS_TDEP_PCAL_LINE9_CORRECTION_REAL = -1.225311825692188e-05 H1:CAL-CS_TDEP_PCAL_LINE9_CORRECTION_IMAG = -1.86640431820706e-06 H1:CAL-CS_TDEP_PCAL_LINE9_DELTAL_PCAL_CORR_REAL = -1.2536323993117549e-05 H1:CAL-CS_TDEP_PCAL_LINE9_DELTAL_PCAL_CORR_IMAG = 6.151674369903049e-07 H1:CAL-CS_TDEP_PCAL_LINE10_CORRECTION_REAL = -5.797058292955626e-06 H1:CAL-CS_TDEP_PCAL_LINE10_CORRECTION_IMAG = -1.255531060451176e-06 H1:CAL-CS_TDEP_PCAL_LINE10_DELTAL_PCAL_CORR_REAL = -5.9206513469689526e-06 H1:CAL-CS_TDEP_PCAL_LINE10_DELTAL_PCAL_CORR_IMAG = 3.855684838072193e-07 H1:CAL-CS_TDEP_PCAL_LINE1_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE2_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE3_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE4_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE5_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE6_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE7_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE8_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE9_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE10_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_X_COMPARE_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_Y_COMPARE_PCAL_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_SUS_LINE1_SUS_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_SUS_LINE2_SUS_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_SUS_LINE3_SUS_DEMOD_PHASE = 0.0 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NCP_D_A_TST_REAL = -2.6563608646392822 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NCP_D_A_TST_IMAG = -1.9480400085449219 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NCP_D_A_PUM_REAL = -0.9340952634811401 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NCP_D_A_PUM_IMAG = 3.542933464050293 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NCP_D_A_UIM_REAL = 0.3999037742614746 H1:CAL-CS_TDEP_PCAL_LINE1_REF_C_NCP_D_A_UIM_IMAG = -0.13749104738235474 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NCP_D_A_TST_REAL = 0.0033286313991993666 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NCP_D_A_TST_IMAG = 0.0004581646644510329 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NCP_D_A_PUM_REAL = 1.807358603400644e-05 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NCP_D_A_PUM_IMAG = 7.847846973163541e-06 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NCP_D_A_UIM_REAL = -3.0745204071536136e-07 H1:CAL-CS_TDEP_PCAL_LINE2_REF_C_NCP_D_A_UIM_IMAG = 2.493704300832178e-07 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_A_TST_NL_REAL = 2.4024121580978886e-10 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_A_TST_NL_IMAG = 9.938732059566746e-10 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_D_A_TST_REAL = -2.551145076751709 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_D_A_TST_IMAG = -2.036994695663452 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_D_A_PUM_REAL = -1.0326595306396484 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_D_A_PUM_IMAG = 3.381134033203125 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_D_A_UIM_REAL = 0.37365004420280457 H1:CAL-CS_TDEP_SUS_LINE3_REF_C_NCP_D_A_UIM_IMAG = -0.12728333473205566 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_A_PUM_NL_REAL = -6.2387282839804215e-12 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_A_PUM_NL_IMAG = 3.3498464419023932e-12 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_D_A_TST_REAL = -2.814112663269043 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_D_A_TST_IMAG = -1.7964863777160645 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_D_A_PUM_REAL = -0.7518160939216614 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_D_A_PUM_IMAG = 3.7846248149871826 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_D_A_UIM_REAL = 0.43838682770729065 H1:CAL-CS_TDEP_SUS_LINE2_REF_C_NCP_D_A_UIM_IMAG = -0.15658241510391235 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_A_UIM_NL_REAL = 1.3083546399061952e-11 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_A_UIM_NL_IMAG = 2.760316281102959e-12 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_D_A_TST_REAL = -3.0085289478302 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_D_A_TST_IMAG = -1.5760422945022583 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_D_A_PUM_REAL = -0.46284520626068115 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_D_A_PUM_IMAG = 4.079708099365234 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_D_A_UIM_REAL = 0.4844558835029602 H1:CAL-CS_TDEP_SUS_LINE1_REF_C_NCP_D_A_UIM_IMAG = -0.18818797171115875 H1:CAL-CS_TDEP_PCAL_LINE1_REF_RESP_REAL = -6.57924090319284e-07 H1:CAL-CS_TDEP_PCAL_LINE1_REF_RESP_IMAG = 4.424991857376881e-07 H1:CAL-CS_TDEP_PCAL_LINE2_REF_RESP_REAL = 2.1978924280574574e-07 H1:CAL-CS_TDEP_PCAL_LINE2_REF_RESP_IMAG = 3.482539909782645e-07 H1:CAL-CS_TDEP_SUS_LINE3_REF_RESP_OVER_A_TST_NL_REAL = 688825920.0 H1:CAL-CS_TDEP_SUS_LINE3_REF_RESP_OVER_A_TST_NL_IMAG = 2370064384.0 H1:CAL-CS_TDEP_SUS_LINE2_REF_RESP_OVER_A_PUM_NL_REAL = 386471854080.0 H1:CAL-CS_TDEP_SUS_LINE2_REF_RESP_OVER_A_PUM_NL_IMAG = -91548483584.0 H1:CAL-CS_TDEP_SUS_LINE1_REF_RESP_OVER_A_UIM_NL_REAL = -107279032320.0 H1:CAL-CS_TDEP_SUS_LINE1_REF_RESP_OVER_A_UIM_NL_IMAG = 202074095616.0 H1:CAL-CS_TDEP_SUS_LINE3_REF_A_TST_NL_REAL = 6.899234233130006e-17 H1:CAL-CS_TDEP_SUS_LINE3_REF_A_TST_NL_IMAG = 3.000099907830698e-16 H1:CAL-CS_TDEP_SUS_LINE2_REF_A_PUM_NL_REAL = -1.8886437967946025e-18 H1:CAL-CS_TDEP_SUS_LINE2_REF_A_PUM_NL_IMAG = 9.889865495478677e-19 H1:CAL-CS_TDEP_SUS_LINE1_REF_A_UIM_NL_REAL = 3.930640261711636e-18 H1:CAL-CS_TDEP_SUS_LINE1_REF_A_UIM_NL_IMAG = 8.6988133013424e-19