J. Kissel

More UIM driver spelunking uncovers a false alarm, but a definite bug in the QUAD front-end code.

I found that the H1 SUS ETMY COILOUTF Bank (the bank that compensates for the analog coil driver electronics frequency response) for UIM / L1 stage has its last set of filters which compensated for the last stage of z:p = 10.5:1 [Hz] low pass were errantly OFF. Thinking that this might be the source of the frequency dependent descrepancy I've been whinning about for the past week in the measured UIM actuation strength (identified in LHO aLOGs 21015 and 21049), I made sure to conlog back to the state of the BIO request and filter banks during those measurements. Yup -- these compensation filters were OFF then too.

BUT -- IT DOESN'T MATTER.
(1) If there were a low-pass ON without an appropriate compensation filter, then we would see a *reduction* from 1/f^6 drive strength in the measurement starting at 1 [Hz]. We see an *increase* measured drive strength from 1/f^6 starting at ~50 [Hz]. 
(2) *If* there was a low-pass ON we would see a reduction in actuation strength. However, in State 1, there are NO low-pass filters ON (see T1100507 -- note that this document has NOT been updated to reflect the chage in zero frequency of the output impedance network). Further, because of the simLP3 / antiLP3 perfect compensation, which is what *would* be on if there were no bug, then there is no difference betweeen having both ON and both OFF. That means as long as the antiAcq filter was ON, and it was, then the driver response is compensated for correctly.

We're in full lock so I can't further confirm this bug, but we should.

Why hasn't the SDF caught this? Because the user requested H1:SUS-ETMY_BIO_*_STATEREQ is supposed to control these filter banks, so we've chosen to not monitor them in the SDF system. Perhaps we should change that decision. 

Or perhaps we should just fix the bug.