Reports until 16:20, Wednesday 27 November 2019
H1 SUS (DetChar, GRD, ISC, OpsInfo)
jeffrey.kissel@LIGO.ORG - posted 16:20, Wednesday 27 November 2019 - last comment - 16:06, Friday 31 July 2020(53528)
UIM (L1) Low pass Filtering now ON: ITMs State 4 (All Lowpasses ON), ETMs State 2 (One Lowpass ON)
J. Kissel

As per our studies on Monday, Keita advised that we engage at least some level of analog low-pass on the QUADs' UIM coil drivers (see LHO aLOG 53376, and subsequent comments.)

After we lost lock from an obscene amount of wind, I've now switched the ETMs to be in state 2, with *one* low pass on. This is the state I studied in LHO aLOG 53486.

For ETMY, it was as easy as requesting state 2 and accepting it in the SDF system. However, for ETMX, I found that the ALS_DIFF guardian was requesting state 1 after every lock loss. So, I've changed the hard-coded request (which lived in the DOWN state), to be to request state 2. And also accepted this in the SDF.

It looks like someone has already requested that the ITMs are in state 4 (with all three z:p = 10:1 filters ON), and accepted as such in SDF. These have been ON throughout the last ~24 hour lock stretch that started at the end of maintenance yesterday. State 4 should be fine as far as actuator saturations because we never send any drive request to the UIM stage of the ITMs. As such, turning on ALL low passes will only filter the DAC noise which is what we want. 
Comments related to this report
jeffrey.kissel@LIGO.ORG - 18:43, Wednesday 27 November 2019 (53531)
Here's a screenshot of the UIM DAC requested drive during the first successful lock acquisition after switching on these low passes. I also attach an ASD of the UIM drive request during the noisiest part of the acquisition (when the DARM error signal is AS45Q.)

We need more statistics regarding the early parts of the sequence (i.e. when ALS DIFF is acquiring) when the environment isn't awful [we had lots of sudden lock losses during the FIND_IR stages of ALS that couldn't be directly attributed to lack of range, but it's still suspicious], but it looks like we come quite close the DAC range when we're in the CARM reduction step, when DARM is on AS45Q.

More data to come!
Images attached to this comment
jenne.driggers@LIGO.ORG - 13:20, Tuesday 03 December 2019 (53652)

I have reverted ETMX's L1 back to state 1.  We suspect that this (it having been set to 2) is the reason we've been losing lock in the carm offset reduction sequence lately.  Keita pointed out that ETMY needed to be in state 2, since it gets a lot of low frequency actuation but no deliberate high frequency drive.  However since ETMX gets length locking signal at a broad range of frequencies, it doesn't have the same quantization noise problems.  So, ETMY is left in the lower noise (has an analog lowpass) state 2, but ETMX is back in the higher range (no analog lowpass) state 1.  This has been changed in the ALS_DIFF guardian, and Niko is keeping an eye on the channel to make sure it's not written back to 2 somewhere else.

This has been accepted in SDF, so operators should not see an SDF diff when we get to NomLowNoise.

camilla.compton@LIGO.ORG - 11:52, Thursday 05 December 2019 (53706)
I have plotted ETMX L1, L2, and L3 for lock-losses from ICS_LOCK states ~300 (e.g. CARM_OFFET_REDUCTION) while UIM L1 was in state 1.
Out of the 8 I looked at, all were similar to the examples attached (UIML1sat.png), where the locklosses seem to be caused by L1 ETMX saturating (going well over it's max output of 131,000) and causing L3 ETMX to ring up more than it can handle (you can see it flat lining in all plots).  There is no sign of movement on ETMY or ITMY at this time. This more evidence that for UIM L1, state 2 is not the best solution.
The three bottom plots are ETMX L1, L2, and L3. The top plot to show exact time of lockloss.
 
Interestingly when looking back at lock-losses from ISC_LOCK at states ~300 before the state change, it seems the cause has been ETMX L3 saturating while ETMX L1 is at smaller values (~80,000) so not adjusting enough to  stabilize L3? Example below as extra.png. Times this happened: Nov 16 08:37:32 UTC; Nov 16 10:55:49 UTC; Nov 05 01:19:05 UTC
Images attached to this comment
jeffrey.kissel@LIGO.ORG - 16:06, Friday 31 July 2020 (56349)
For the brief, 6-day, time period that the UIM LP1 filter was on between 2019-11-27 and 2019-12-03 (naturally, in between the regular calibration measurements that would have helped us quantify it more easily), the poor compensation of this driver's response manifests in systematic error in the DARM calibration.

Making a *very* long story short,
    (a) The systematic error is very small, (of course frequency dependent, but at most) 0.15% and and 0.09 deg, and
    (b) Performing this study reminded us that the original data upon which the compensation was based (see LHO aLOG 46927) is quite flawed, and this chassis should be remeasured and the compensation updated.

Attached is a prediction of what the calibration (response function) systematic error from this configuration change was over those fateful 6 days.
For details on how this estimate was created, see PART I of G2000527.

The script used to re-fit the data and make all corresponding plots for G2000527 lives here:
    /ligo/svncommon/CalSVN/aligocalibration/trunk/Common/Electronics/H1/Scripts/
        fit_ETMX_UIM_driver_20190203_IIRrational_20200401.py
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