jeffrey.kissel@LIGO.ORG - posted 12:59, Monday 01 August 2022 - last comment - 15:06, Monday 01 August 2022(64243)
Immediate Plan for 20-bit DACs: Replace all DACs which QUAD PUM Drivers (There will be fall out, and weirdness, but so be it.)
J. Kissel, reporting for decisions made by D. Sigg, S. Dwyer
As a result of this weekend's DAC card failure, we're now excited about getting going on replacing 18-bit DAC cards with 20-bit DAC cards. We only have 8-ish cards at the moment (with 5 in A+ stock that we can use as "spares" if they fail).
After debating several options this morning (a debate only because our card count is limited),
(1) (1 card) Only replace h1susex IO chassis' 3rd of four 18-bit DAC cards, DAC2, (the fifth card in the chassis, counting of ADC0 on the left). This option leaves TMSX with four OSEMs, M1F1, M1F2, M1F3, M1LF driven with a 20-bit DAC, and the other two, M1RT, M1SD. It's an odd combo leaving a weird configuration, but it's doable.
(2) (2 cards)
:: (a) Replace h1susex IO chassis' 3 and 4th 18-bit DAC cards, DAC2 and DAC3 (the fifth and sixth in the chassis). This option means that all of TMSX's OSEMs are driven by 20-bit DACs, making the feng-shui a little better at EX.
:: (b) Replace only DAC2 in both the h1susex and h1susey chassis at the end station. This leaves the same wonky situation as option (1), but again doable.
(3) (4 cards)
:: (a) Replace all PUM drivers' 18-bit DACs. This improves the noise performance in the key SUS stages, but is pretty messy because the PUM stage is differently shared across the ITMs and the Beam Splitter, and different from the end-station situation described above.
:: (b) Replace both EX and EY DAC2 and DAC3 cards, as described in (2) above
:: (c) Scrap all plans for PUM replacement, and go for, instead, starting to replace the recycling cavity triples. Except for SR3, those HSTSs and HLTSs have their M2 and M3 stages grouped on the same 18-bit DAC. So, if we feel that those are more interesting we could do that. But, SR3's situation would be just as wonky as an end station or corner station QUAD, except it'd be the OMC SUS that would inadvertently become a part of the discussion.
From here, the options begin to abound, and we just get to the point of a rolling upgrade.
For tomorrow, Tuesday Aug 02, 2022, we've chosen to go with option 3 (a). It'll be messy, but that's where we're doing. Feng shui be darned!
I attach 4 screenshots of the simulink model usage of all the 4 PUM stages: , , , .
I also attach screenshots of the two TMTSs (TMSX TMSY), and the BS, which will be impacted by this upgrade. So, the "collateral upgrade" will be 2/3rds of the TMSX and TMSY M1 OSEMs (the F1, F2, F3, and LF OSEMs) and 2/3rds of the top mass of the Beam Splitter (again, M1 F1, F2, F3, and LF).
The price we pay for trying to save money and consolidate during aLIGO!
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D. Barker, J. Kissel, E. von Ries We've walked through all the changes that'll be necessary to implement this change, the biggest of which is identifying exactly what cards will be swapped. To identify which card will be changed, we walked through the above Simulink Model changes and red-lined the three IO chassis in question of the As-Built LHO IO Chassis drawing collection, D1301004. Attached are the redlines of pages 22, 33, and 36, which correspond to the current version of the h1susb123, h1susex, and h1susey IO chassis, respectively. The redlines are all merged into one .pdf, and in that b123, ex, ey order. Once the changes are complete, Dave will make the official update to D1301004. In addition to this card swap, we'll need to change the following user models: - h1susitmx, h1susitmy, h1susbs - h1susetmx, h1sustmsx - h1susetmy, h1sustmsy And the following iop models: - h1susb123 - h1susex - h1susey We'll post screenshots of the model changes when complete. Again, the goal is to go for install / changes tomorrow.
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