Correction on Sep 1:
Some zero/pole numbers in the original entry was incorrect, so I made some corrections below.
Specifically, ILPD has zp=([71mHz;72mHz;2.7k],[3.1;3.4;130;2.3k]) (130 and 2.7k were swapped in the original entry). Plots were updated accordingly.
Summary:
What's done and found:
These things were mostly done during Tuesday maintenance.
Some more explanation:
Since the outer loop injects its signal to the inner loop error point, OLTF of outer loop is basically the ratio of two transfer functions, one from RIN to the output of the outer loop servo board (H_OLBoard) and the other from RIN to the inner loop error point (H_ILPD):
OLTF_OL=H_OLBoard/H_ILPD.
As I noted before (alog 26879 and an entry attached later to that one), the inner loop diode is equivalent of 660 Ohm DC trans impedance and zp=([71mHz;72mHz;2.7k],[3.1;3.4;130;2.3k]) . DC output of this inner loop diode is about 1.6V differential (measured). For details you need to look at D1001998.
H_IL = 1.6[V]*zp([71mHz;72mHz;2.7k],[3.1;3.4;130;2.3k]).
OTOH, outer loop trans impedance amplifier doesn't have any coloring in the new prototype (the old one has this compensation, see D1300639), and each diode outputs about 130mV or so at 2W. There are four PDs, so the sum of all PDs at DC is about 520mV at 2W. The outer loop chassis has a flat gain of 3, a variable gain (VGA) with -12.8 to 45.6dB range, and a servo filter SERVO=zp([600;9k],[20,20,380]) with the DC gain of 1 (see alog 29293). (There should be another factor of 2 from SE to DIFF conversion, but the negative leg of DIFF is grounded, so this is not there at the moment.). There's also a MC pole (9k) in H_OLBoard.
H_OLBoard(2W) = 0.52[V]*3*IMC*VGA*SERVO = RIN*1.6[V]*VGA*zp([600],[20,20,380]).
Combining these,
OLTF_OL @2W = H_OLBoard@2W/H_ILPD ~ zp([71mHz;72mHz;2.7k],[3.1;3.4;130;2.3k])/zp(600, [20;20;380])/VGA.
Thing is, H_IL is absolutely huge at 3Hz and higher due to double 70mHz zeros, and the outer loop board as of now doesn't have the gain necessary to keep the UGF at some kHz.
Second attachment bottom shows the above theoretical OLTF at 2W with the maximum (45.6dB) VGA and the measured data. Remember that the "measured" is no good measurement because it was saturating, but nevertheless you can see that the measurement is not totally unreasonable.
It's clear to that we need something in the outer loop to counter 70mHz double zeros.
Implementing that would also help AC coupling. As of now, the AC coupling is already sort of aggressive, but not aggressive enough. If I bring up the blue curve in the second plot bottom by 80dB or so to set the outer loop higher UGF at 2kHz, the lower UGF would become .2Hz or so, that might not be good enough of an AC coupling.
12:37 PDT DAQ restart to add following VAC channels
+[H0:VAC-LX_IBM_II122_AIP_IC_LOGMA]
+[H0:VAC-LX_IBM_II122_AIP_IC_LOGMA_ERROR]
+[H0:VAC-LX_IBM_II122_AIP_IC_MA]
+[H0:VAC-LX_IBM_II122_AIP_IC_MA_ERROR]
+[H0:VAC-LX_IBM_II122_AIP_IC_VOLTS]
+[H0:VAC-LX_IBM_II122_AIP_IC_VOLTS_ERROR]
+[H0:VAC-LX_IBM_VI122_AIP_PRESS_TORR]
+[H0:VAC-LX_IBM_VI122_AIP_PRESS_TORR_ERROR]
+[H0:VAC-LX_OBM_II136_AIP_IC_LOGMA]
+[H0:VAC-LX_OBM_II136_AIP_IC_LOGMA_ERROR]
+[H0:VAC-LX_OBM_II136_AIP_IC_MA]
+[H0:VAC-LX_OBM_II136_AIP_IC_MA_ERROR]
+[H0:VAC-LX_OBM_II136_AIP_IC_VOLTS]
+[H0:VAC-LX_OBM_II136_AIP_IC_VOLTS_ERROR]
+[H0:VAC-LX_OBM_VI136_AIP_PRESS_TORR]
+[H0:VAC-LX_OBM_VI136_AIP_PRESS_TORR_ERROR]
+[H0:VAC-LY_IBM_II192_AIP_IC_LOGMA]
+[H0:VAC-LY_IBM_II192_AIP_IC_LOGMA_ERROR]
+[H0:VAC-LY_IBM_II192_AIP_IC_MA]
+[H0:VAC-LY_IBM_II192_AIP_IC_MA_ERROR]
+[H0:VAC-LY_IBM_II192_AIP_IC_VOLTS]
+[H0:VAC-LY_IBM_II192_AIP_IC_VOLTS_ERROR]
+[H0:VAC-LY_IBM_VI192_AIP_PRESS_TORR]
+[H0:VAC-LY_IBM_VI192_AIP_PRESS_TORR_ERROR]
+[H0:VAC-LY_OBM_II196_AIP_IC_LOGMA]
+[H0:VAC-LY_OBM_II196_AIP_IC_LOGMA_ERROR]
+[H0:VAC-LY_OBM_II196_AIP_IC_MA]
+[H0:VAC-LY_OBM_II196_AIP_IC_MA_ERROR]
+[H0:VAC-LY_OBM_II196_AIP_IC_VOLTS]
+[H0:VAC-LY_OBM_II196_AIP_IC_VOLTS_ERROR]
+[H0:VAC-LY_OBM_VI196_AIP_PRESS_TORR]
+[H0:VAC-LY_OBM_VI196_AIP_PRESS_TORR_ERROR]
I was about to take a screen shot of the beams from the various PSL cavities when all of a sudden the screen went black. The laser tripped. I haven't performed any forensics but it looks like the same problem as last night.
Preliminary forensics show that indeed this laser trip happened for the same reason as last night's (and Saturday's): something glitched with the FE flow (either a glitch in the flow meter or an actual glitch in the flow), which took the crystal chiller offline, which then shut down the entire laser. The power watchdogs never tripped, only the flow interlocks for the FE and the crystal chiller. In the first attachment the FE flow dropped just before the HPO began to lose power. The second attachment shows the FE flow interlock tripping also just before the HPO begins to lose power, while the 3rd shows the FE losing power before the HPO does. This points to a problem in the FE flow as the cause for this PSL trip. The 4th attachment simply shows that the power watchdogs did not trip in this instance.
Filed FRS #6133.
On Monday, I went to EndX to retrieve data from the anemometers I had around the wind fence, and found the set up kind of trashed. The ultrasonic gust sensor had been blown over, which sounds like a common issue with that setup from the past. The fall, however, broke some of the plastic pieces that the screws holding the head of the sensor together. I think the sensor is still functional, but it will need to be glued back together.
One of the other cup anemometers may have been attacked by a bird, or possibly a vehicle. The cable had been unplugged from the sensor, drug more than 20 feet and the sheath and a couple wires had been cut. I would normally blame a bird for that, but the copper tube I had secured the anemometer to was also bent. It's possible that a gust of wind had bent the post, but neither of the other posts were similarly bent. There are tire tracks up around the fence, but it's hard to say how old they are, it's likely they are left over from the fence install, and none of them come very close to the post. Finally, the batteries in the logger for the 3 cup anemometers had worked free of their connections, so the logger only collected about 3 days worth of data, even though they were installed for a week and a half. The batteries are held in place by a plastic strap, and this strap probably got soft in the sun, which allowed the batteries to work they way free.
I don't know what we can do to keep birds (or bees, they seem to really like the fence) away from the outside instruments, but couple of other things I'll get for next time:
1. Cones or flags to mark a stay clear around the fence.
2. Weights and guy lines for the ultrasonic sensor, after I get it back together.
3. A foam shim to secure the batteries in the cup anemometer datalogger.
Kyle, Chandra Starting step down of heating of Vertex RGA -> Closed calibration gas bottle isolation valves and reduced variacs (except one supplying turbo inlet) by 10% -> Will need access to continue this process every few hours or so throughout the day.
~1100 - 1110 hrs. local -> Kyle in and out of LVEA -> Reduced variacs 10%
~1325 - 1335 hrs local -> Kyle in and out of LVEA -> Closed 1 1/2" turbo isolation valve, reduced variacs 10%
1455 - 1300 hrs. local -> Kyle in and out of LVEA -> De-energized variacs, i.e. killed heat to Vertex RGA
[Sheila, Kiwamu, Terra, Jenne]
Next up: Try dither loop to hold ETMX spot position in yaw to prevent spot position movement on BS. Separate SOFT loops to X and Y, use offset of XSOFT yaw to hold ETMX spot position constant. Alternatively (or simultaneously), dither BS and demodulate with several different signals at the same time, to understand better how the spot is moving.
We ended up moving PR2 (our uncontrolled recycling optic), and walking it with the POP_A offset. This allowed us to get to a PRC gain of 31.6 by the O1 standard, but without the sideband powers tanking. We think that this was promising, and will come back to it tomorrow. Once we decide that we're happy, we should re-do the green initial alignment setpoints yet again (including the beatnote PDs, which weren't done earlier today) to set this as our reference alignment. Attached is a big screenshot of where we were most happy. Also attached is the PR2 offset screen, time-machined back to before we started moving PR2.
TITLE: 09/01 Eve Shift: 23:00-07:00 UTC (16:00-00:00 PST), all times posted in UTC
STATE of H1: Lock Aquisition
INCOMING OPERATOR: Sep
SHIFT SUMMARY: Lots of commissioning, a PSL trip, and a small earthquake.
LOG:
Attached are trends of the various flow sensors in the PSL. Comparison of the timestamps shows that the high power oscillator tripped because of a flow rate problem with the AMP circuit. The problem does not lie within the 4 laser heads, leaving either the front end power amplifier, or the 4 crystal chambers. Unfortunately checking the 4 crystal chambers requires dismantling the laser. The vortex flow sensor in the AMP circuit is relatively new. The other object in that circuit is the power amplifier module. An inspection mirror might be able to afford a view of the plumbing underneath the housing. One can see that the flow rate in the AMP circuit drops before the output of the front end laser drops, and that the output power of the front end laser drops before the high power oscillator. I think the sequence of events is the following: 1. flow rate problem in the AMP circuit trips the flow watch dog of the front end laser 2. the switching off of the front end laser breaks the injection locking of the high power oscillator 3. the loss of injection locking results in a power drop in the high power oscillator which then trips the power watch dog 4. the power watch dog switches the high power oscillator off
Jeff spotted this this morning in the crystal chiller circuit filter. Wasn't there a couple of days ago. Might be the cause of last night's syncope.
Filed FRS #6132.
Unsuccessful at damping ITMX 15520 Hz PI several times tonight (previously seen here and here). We find that larger damping drive does not equal greater damping: When this mode was test driven and damped after the thermal transient at 50 W, a best gain and phase was found for damping. When the mode began to ring up later, increasing gain (by some large amound but still under saturation) or flipping sign and/or changing phase only resulted in faster ringup. This is true when still far below DAC saturation levels. It seems as if there is some gain sweet spot that must be found.
--- --- ---
We had three occasions to damp ITMX 15520 Hz mode during the night. During the first, I successfully damped and it then rerang up (perhaps due to offset adjustments?) and lost lock. During the second and third I was not able to damp the mode and avoided lockloss only by decreasing power 50 W --> 25 W.
Below you see the mode first ring up and my gain trial and error response until I settle at 10000 and the mode is fully damped. Soon after, you see the mode ring up again right after the yaw offset step from ~ -0.02 --> -0.01. Note we started with a small negative gain so I just assumed we had actually been ringing up the mode the past few days.
During the second 50 W lock, damping was already running at the gain and phase settings that were effective at damping the first ring up above (+10000 gain, -60deg). Despite this, you see the mode slowly rising ~3 hours into the 50 W lock and my gain adjustments trying to damp. Note that here I start with some mostly successful positive gain (i.e. shallow slope) yet both raising the gain and flipping the gain sign cause the mode to ring up. I tried phase changes at this point too but existing was best. I avoided lockloss by decreasing power to 25 W, allowing mode to ring down enough to damp, then powering back up. I also rechecked my gain and phase at 50 W (post thermal transient time) and it would still drive and damp with a very steep slope. Still, an hourish later the mode began to ring up. I found similar behavior in the third attempt as the second and had to decrease power to avoid lockloss.
Things to note:
Things to try:
I've plotted the HOM spacing (H1:TCS-SIM_IFO_XARM_HOM_SPACING_HZ_OUTPUT) from the TCS simulator vs the RMS of the 15520Hz PI mode. It seems to be ringing up consistently when the simulated HOM spacing edges up over 5034Hz.
The first plot shows the HOM spacing at the same time that Terra sees and tries to damp the mode. You can see the HOM spacing edge up over three hours as the surface curvature is becoming flatter. The 15520 mode starts to ring up and then Terra is able to damp it. It looks like the subsequent yaw offset increased the power in the arm very slightly which has, in turn, increased the heating of the optic. The estimated HOM spacing increases, most likely increasing the parametric gain of the 15520Hz mode in the process.
The second plot shows the HOM spacing over a larger time frame (19 hours) and the associated RMS of the 15520Hz mode. Every time the HOM spacing reaches 5034Hz, the mode starts to ring up.
Some notes:
In fact, it's not too much of a stretch to use the parametric gain of the modes in conjunction with the simulated HOM spacing to continually update the total absorbed power in the arms.
Thanks Aidan.
I've attached a look at the HOM spacing during two times that this same mode rang up while no damping was being applied (DAMP_GAIN = 0), unlike the times you looked at. First time the mode rang up when HOM spacing was about the same as you found, 5035. Second (indicated with red arrow), rang up around 5025. Both locks were 50 W.
Jeff K, Chris Whittle
We used the interometer uptime to test the ITM charge measurement script by taking data for ITMX. With the previously used excitation frequency of 20.1 Hz being used for other measurements, we opted for an excitation at 11.5 Hz. At this frequency, we found an excitation amplitude of 1k counts to be sufficient for a good SNR. We have taken data at bias voltages between -10k and 10k counts, but have yet to perform post-processing.
We additionally tested whether flipping the analog voltage out switches to the quadrants had any effect on the locked interferometer. No effects were observed for flipping on/off quadrant voltages in various orders. This test was performed on just ITMX and with no actual output voltage to the quadrants.
Plotting the PSD for each of the tested bias voltages (see here) shows almost identical peaks in DARM for each bias voltage. I confirmed that the voltages being driven at the time were as expected (see here).
Zooming in on the PSD (see here) shows a peak ordering that seems consistent with a zero crossing at a large negative bias voltage. This is inconsistent with previous measurements, which found a zero crossing at 3k for ITMX. I will repeat these measurements later, covering the full range of bias voltages.
The same measurement was repeated sweeping over a larger range of bias voltages (up to ±100k counts). Attached are plots of the DARM response as a function of bias voltage for both sets of measurements. Both are consistent with a zero crossing at a large negative bias voltage.
Expecting PT120 to be 3 x 10-9 torr -> Don't see logged activity to explain -> am on road and not able to trend data etc.
Probably gauge problem since 114 did not follow.
Some more gauges -
Pressure change was due to incorrect wiring of PT-120 during Beckhoff transition and was brought to light when Gerardo incorporated signal wiring for AIPs and needed to turn off PT180 this week. Pressure reading now is correct (and the same as it was in Q2 2016). We should check other gauges to be sure they are wired properly and reading correct pressures. Wearing laser safety glasses contributes to issues like this because visibility is compromised.
The new prototype board was modified to satisfy some of the things in the requirement (T1600064) as listed in 1., 3. and 5. below. I also listed things that were not modified but would have been good if recommendations in T1600064 were implemented.
I wouldn't claim that we won't modify it further, but this is just the current state.
In this entry you'll be able to see the electronics modifications in the attached, but the photos are too small to read the original component values, so read the original drawing D1600298 as necessary.
1. Readback of the PD array signal after the servo loop switch ("SUM PE MON") needed to be DC coupled.
The "whitening" was originally AC-coupled (second attachment) and therefore it was not compatible with digital AC coupling described in the requirement.
We bypassed the big caps in the input of the opamps with some resistors so it acts as one single pole at 2.7k with DC gain of 50 (second attachment, mod 1).
To make the OLTF measurement easier, we made the same change to the whitening downstream of the summation for the excitation DAC output.
The servo board output readback was also AC-coupled, but we want to see if everything is working fine including DC injected into the inner loop board.
We made the output whitening a true whitening (second attachment, mod 2). 0.35Hz zero might be too low, though.
2. The board doesn't implement the analog compensation for the in the inner loop filtering upstream of the error point.
The inner loop error point "whitening" works as a very steep boost seen from the outer loop, roughly an equivalent of (z, p) = ([3; 3; 130], [0.07, 0.07]). T1600064 reccomends to implement the same thing in the outer loop somewhere to cancel this effect to make the loop design simpler.
Since this is not compensated in the prototype board, the outer loop OLTF would become huge for f<3Hz. This means that the digital AC coupling servo should work REALLY hard to effectively AC-couple the entire outer loop at, say, f<1Hz, without reducing the outer loop gain at 10Hz and up.
We do not implement this by analog cut and paste job (no opeamp available for this on the board), but we'll try to make it work by an aggressive digital AC-coupling filter.
3. Integrator as a boost doesn't go well with digital AC coupling so it was converted to a usual boost with finite DC gain.
The error point of the digital AC coupling servo is kept zero at DC (i.e. a pole at zero Hz). The outer loop prototype had an integrator as a boost.
Of course they don't go well as any tiny DC difference between the AC coupling error point and the integrator input will be integrated and eventually the servo runs away. But we don't really need a pole at zero Hz.
We changed it such that the first boost acts as 50Hz LPF with DC gain of 10, and when added to a flat unity gain it becomes 500:50 boost (third attachment) (but see the next entry).
4. Boosts were implemented as three parallel integrators added to a flat unity gain.
We had a choice of unity gain, zp=50:0, 100:0 or 150:0. See the first and the third attachment.
As described in 3. above, we already changed one integrator to []:50 LPF so the boost becomes 500:50.
We didn't fix the parallel summation, it might be OK to go without any boost or using just one.
But T1600064 shows our standard practice of connecting boosts in series.
5. Outer loop servo filters on the board were also changed.
Originally the servo filtering was something like (z,p)=(100, [20^2;40]) (fourth attachment). As described in 2. above, 1st loop effectively adds ([3^2; 130], [0.07^2]). IMC adds another pole at ~8kHz.
Everything added together it's like ([3^2; 100; 130], [0.07^2; 20^2; 40; 8k]), and this might be OK.
But we made a change so the board became ([380;9k],[20^2;600]) by changing one of zero-Ohm resistors in the second stage and one C-R pair in the third stage (fourth attachment). Everything added together it would be ([3^2;130;380;9k], [0.07^2; 20^2;600; 8k]).
This change might not have been necessary. We just felt that letting a big 4.7uF capacitor and a zero-Ohm resistor to determine AC gain at around 10kHz in the first as well as the second stage was maybe too much of an uncertainty in the AC gain.
6. Sallen-Key at 0.1Hz for Digital AC coupling path might be too aggressive
For the moment the Sallen-Key is disabled for the digital AC coupling path (so the only analog filtering is a 10Hz LPF) to make things easier as we try to make it work.
Outer loop and digital AC coupling topology
Error point for the digital AC coupling is upstream of the summation point for the outer loop and the third loop (ERR1 in the attached medm). This comes from two requirements:
If the error point is downstream, the 3rd loop gain will be eaten by the AC coupling loop.
This means that, as we change the VGA gain, the offset coming between the AC coupling error point and the input to the VGA will be amplified and injected downstream, and if this becomes the problem we need to compensate for that using the analog excitation offset.
Second attachment shows the AC coupling OLTF, with the setting shown in the first attachment.
I was looking (again) at the ISS inner loop circuit diagram to make sure that I understand the system correctly and found that my alog 26879 was wrong about inner loop diode in that one pole and one zero were somehow swapped (see the new entry I've just made as an attachment to the alog 26879.
Anyway, since the amplitude actuation of the outer loop summation point of the inner loop is the inverse of the inner loop sensing "whitening", 2. should read
"The inner loop error point "whitening" works as a very steep boost seen from the outer loop, roughly an equivalent of (z, p) = ([3; 3; 2.34k;2.7k], [0.07;0.07;130])".
Sorry for a confusion, it seems like it's too late to fix the original alog entry above.
Correction of correction (sorry).
Original alog 26879 seems to have been correct, therefore the origial entry of this alog should be correct.
The inner loop error point "whitening" works as a very steep boost seen from the outer loop, roughly an equivalent of (z,p)=([3; 3; 130], [0.07, 0.07])
Sorry for further confusion. Again I cannot correct the above original entry nor the above correction any more, thus this entry.
Executive summary: * Good news - as expected, the 16-Hz comb due to the OMC length dither is gone (at least at this sensitivity level) * Bad news - low-frequency 1-Hz combs remain, and some new low-frequency combs & lines have appeared Some details:
I analyzed the 56.8406Hz comb with coherence tool and here are the results. The same structure is found to be significant in 35 channels in ER9, distributed in ISI, SUS, PEM and LSC subsystems. Among all the 35 channels, 22 of them does not have a range up to its 11th harmonic, 625.25 Hz.
Keith indicated in his slog entry that a DAQ malfunction is suspected to be the ultimate source of this, and these findings suggest it's in an EX electronics crate.
Here are a few interesting observations:
The 9th harmonic at 511.56Hz is the weakest in most channels, sometimes buried in noises.
In some PEM channels, there are missing lines at low frequency (< 200 Hz) and high frequency (> 500 Hz).
In PEM and ISI channels, there seems to be another comb structure with a frequency slightly larger than 56.8406Hz coexists. That one is usually most significant at its third harmonics.
Generally, the structure is more clearly seen in LSC, SUS and ISI channels
Sample plots from each subsystem:
Figure 1: We can see the 56.8406Hz comb structure exists with its 9th harmonic weakest in ISI.
Figure 2: PEM channels have more noises and, as in ISI channels, the other comb structure coexists.
Figure 3: SUS channels do not have enough range up its 11th harmonic but we can see its first and second harmonic here.
Figure 4: There is only one channel from LSC but the structure is very clear.
All plots and a list of channels are attached in the zip file.
Just to be clear. Here are the channels that the coherence tool is finding the comb. This is what is supporting Keith's assumption that the problems could be in an EX electronics crate. Channels List: H1:ISI-ETMX_ST2_BLND_RX_GS13_CUR_IN1_DQ_data H1:ISI-ETMX_ST2_BLND_RY_GS13_CUR_IN1_DQ_data H1:ISI-ETMX_ST2_BLND_RZ_GS13_CUR_IN1_DQ_data H1:ISI-ETMX_ST2_BLND_X_GS13_CUR_IN1_DQ_data H1:ISI-ETMX_ST2_BLND_Y_GS13_CUR_IN1_DQ_data H1:ISI-ETMX_ST2_BLND_Z_GS13_CUR_IN1_DQ_data H1:LSC-X_TR_A_LF_OUT_DQ_data H1:PEM-EX_ACC_BSC9_ETMX_Y_DQ_data H1:PEM-EX_ACC_BSC9_ETMX_Z_DQ_data H1:PEM-EX_ACC_ISCTEX_TRANS_X_DQ_data H1:PEM-EX_ACC_VEA_FLOOR_Z_DQ_data H1:PEM-EX_MIC_VEA_MINUSX_DQ_data H1:PEM-EX_MIC_VEA_PLUSX_DQ_data H1:ISI-ETMX_ST1_BLND_Y_T240_CUR_IN1_DQ_data H1:ISI-ETMX_ST1_BLND_Z_T240_CUR_IN1_DQ_data H1:ISI-GND_STS_ETMX_X_DQ_data H1:ISI-GND_STS_ETMX_Y_DQ_data H1:PEM-EX_MAINSMON_EBAY_1_DQ_data H1:PEM-EX_MAINSMON_EBAY_2_DQ_data H1:PEM-EX_MAINSMON_EBAY_3_DQ_data H1:PEM-EX_SEIS_VEA_FLOOR_X_DQ_data H1:PEM-EX_SEIS_VEA_FLOOR_Y_DQ_data H1:SUS-ETMX_L1_WIT_Y_DQ_data H1:SUS-ETMX_L2_WIT_L_DQ_data H1:SUS-ETMX_L2_WIT_P_DQ_data H1:SUS-ETMX_L2_WIT_Y_DQ_data H1:SUS-ETMX_M0_DAMP_L_IN1_DQ_data H1:SUS-ETMX_M0_DAMP_P_IN1_DQ_data H1:SUS-ETMX_M0_DAMP_T_IN1_DQ_data H1:SUS-ETMX_M0_DAMP_V_IN1_DQ_data H1:SUS-ETMX_M0_DAMP_Y_IN1_DQ_data
I chased Comb 23 (type K) in Keith’s post, shown in Keith's original post as
This comb has an offset of 153.3545 Hz and a fundamental frequency of 0.0884Hz. It starts at 153.3545 Hz and goes up to its 11th harmonic, 154.3272 Hz. As is listed in Keith's txt file:
Comb 23 (type K, offset=153.354500): Frequency (offset + harmonic x fund freq) Ampl (m/rtHz) Bar (logarithmic) K 153.3545 ( 0 X 0.0884) 1.844961e-19 **** K 153.4429 ( 1 X 0.0884) 1.949756e-19 **** K 153.5314 ( 2 X 0.0884) 2.165192e-19 ***** K 153.6198 ( 3 X 0.0884) 2.181833e-19 ***** K 153.7082 ( 4 X 0.0884) 2.457840e-19 ***** K 153.7966 ( 5 X 0.0884) 2.243089e-19 ***** K 153.8851 ( 6 X 0.0884) 2.709562e-19 ***** K 153.9735 ( 7 X 0.0884) 2.499596e-19 ***** K 154.0619 ( 8 X 0.0884) 2.562208e-19 ***** K 154.1503 ( 9 X 0.0884) 1.945817e-19 **** K 154.2388 ( 10 X 0.0884) 1.951777e-19 **** K 154.3272 ( 11 X 0.0884) 1.703353e-19 ****
I found the comb structure in two channels of ISI subsystem.
Figure 1 shows the plot of channel H1:ISI-HAM6_BLND_GS13RZ_IN1_DQ. Descriptions of this channel can be found here:
https://cis.ligo.org/channel/314371
Figure 2 shows the plot of channel H1:ISI-HAM6_BLND_GS13Z_IN1_DQ. Descriptions of this channel can be found here:
https://cis.ligo.org/channel/314374
In the plots of both channels, we can see a comb structure stands out at the positions of harmonics. We are wondering about the reason for this:
Why these seismic isolation channels?
This post is supplementary to the first post about coherence analysis result for the 56.8406Hz Comb at
https://alog.ligo-wa.caltech.edu/aLOG/index.php?callRep=28619
The first post is addressing the 56.8406Hz comb found in Keith's original post (marked as D comb):
https://alog.ligo-wa.caltech.edu/aLOG/index.php?callRep=28364
Information about this comb from the txt file in Keith's post:
Comb 35 (type D, offset=0.000000): Frequency (offset + harmonic x fund freq) Ampl (m/rtHz) Bar (logarithmic) D 56.8406 ( 1 X 56.8406) 3.968800e-17 *********** D 113.6811 ( 2 X 56.8406) 1.773964e-17 ********** D 170.5217 ( 3 X 56.8406) 7.121580e-18 ********* D 227.3622 ( 4 X 56.8406) 3.232935e-18 ******** D 284.2028 ( 5 X 56.8406) 1.166094e-18 ******* D 341.0433 ( 6 X 56.8406) 1.007273e-18 ******* D 397.8839 ( 7 X 56.8406) 5.962059e-19 ****** D 454.7245 ( 8 X 56.8406) 3.752194e-19 ***** D 511.5650 ( 9 X 56.8406) 2.577108e-19 ***** D 568.4056 ( 10 X 56.8406) 1.964393e-19 **** D 625.2461 ( 11 X 56.8406) 1.891774e-19 **** --------------------------------------------------------------
Besides the 35 channels found in the original post, 7 more channels are found to be relevant to the 56.8406Hz Comb. Two new subsystems, ASC and HPI are involved.
These new channels are:
H1:ASC-X_TR_A_NSUM_OUT_DQ
H1:ASC-X_TR_B_NSUM_OUT_DQ
H1:HPI-ETMX_BLND_L4C_Y_IN1_DQ
H1:HPI-ETMX_BLND_L4C_Z_IN1_DQ
H1:PEM-EX_ACC_BSC9_ETMX_X_DQ
H1:SUS-ETMX_L1_WIT_L_DQ
H1:SUS-ETMX_L1_WIT_P_DQ
So updated channel list is (42 channels in total):
H1:ASC-X_TR_A_NSUM_OUT_DQ
H1:ASC-X_TR_B_NSUM_OUT_DQ
H1:HPI-ETMX_BLND_L4C_Y_IN1_DQ
H1:HPI-ETMX_BLND_L4C_Z_IN1_DQ
H1:ISI-ETMX_ST1_BLND_RX_T240_CUR_IN1_DQ
H1:ISI-ETMX_ST1_BLND_RY_T240_CUR_IN1_DQ
H1:ISI-ETMX_ST1_BLND_RZ_T240_CUR_IN1_DQ
H1:ISI-ETMX_ST1_BLND_X_T240_CUR_IN1_DQ
H1:ISI-ETMX_ST1_BLND_Y_T240_CUR_IN1_DQ
H1:ISI-ETMX_ST1_BLND_Z_T240_CUR_IN1_DQ
H1:ISI-ETMX_ST2_BLND_RX_GS13_CUR_IN1_DQ
H1:ISI-ETMX_ST2_BLND_RY_GS13_CUR_IN1_DQ
H1:ISI-ETMX_ST2_BLND_RZ_GS13_CUR_IN1_DQ
H1:ISI-ETMX_ST2_BLND_X_GS13_CUR_IN1_DQ
H1:ISI-ETMX_ST2_BLND_Y_GS13_CUR_IN1_DQ
H1:ISI-ETMX_ST2_BLND_Z_GS13_CUR_IN1_DQ
H1:ISI-GND_STS_ETMX_X_DQ
H1:ISI-GND_STS_ETMX_Y_DQ
H1:LSC-X_TR_A_LF_OUT_DQ
H1:PEM-EX_ACC_BSC9_ETMX_X_DQ
H1:PEM-EX_ACC_BSC9_ETMX_Y_DQ
H1:PEM-EX_ACC_BSC9_ETMX_Z_DQ
H1:PEM-EX_ACC_ISCTEX_TRANS_X_DQ
H1:PEM-EX_ACC_VEA_FLOOR_Z_DQ
H1:PEM-EX_MAINSMON_EBAY_1_DQ
H1:PEM-EX_MAINSMON_EBAY_2_DQ
H1:PEM-EX_MAINSMON_EBAY_3_DQ
H1:PEM-EX_MIC_VEA_MINUSX_DQ
H1:PEM-EX_MIC_VEA_PLUSX_DQ
H1:PEM-EX_SEIS_VEA_FLOOR_X_DQ
H1:PEM-EX_SEIS_VEA_FLOOR_Y_DQ
H1:SUS-ETMX_L1_WIT_L_DQ
H1:SUS-ETMX_L1_WIT_P_DQ
H1:SUS-ETMX_L1_WIT_Y_DQ
H1:SUS-ETMX_L2_WIT_L_DQ
H1:SUS-ETMX_L2_WIT_P_DQ
H1:SUS-ETMX_L2_WIT_Y_DQ
H1:SUS-ETMX_M0_DAMP_L_IN1_DQ
H1:SUS-ETMX_M0_DAMP_P_IN1_DQ
H1:SUS-ETMX_M0_DAMP_T_IN1_DQ
H1:SUS-ETMX_M0_DAMP_V_IN1_DQ
H1:SUS-ETMX_M0_DAMP_Y_IN1_DQ
Attached images are sample plots from ASC and HPI subsystem.
Full results are also attached.
Here are the coherence search results of all the single lines in ER9 data, which are listed in Keith’s post. I found 29 of all the 198 lines on the list and posted the results on my homepage here:
https://ldas-jobs.ligo-wa.caltech.edu/~duo.tao/ER9_single_lines/index.html
Since there seem to be some confusions about which PD has what kind of analog filtering and sent to which channel, here it is.
I'm quite certain about HPO output before AOM (which is "Power monitor PD" in D1002929) and ISS 1st loop monitors, but not that sure about "monitor PD"s in D1002164. E-travellers are incomplete (they don't say which one is installed where), so I'm just listing the nominal values for these "monitor PD"s.
What | PD name on D0902114 | Circuit type | Analog out | Transimpedance (Ohm) | Analog filter | Channel | Note | Can you find Filter MEDM from sitemap as of this writing? |
HPO output before AOM | PD1 |
Power monitor PD, D1002929 |
DC | 3.3k DC |
H1:PSL-PWR_HPL_DC, DC_LF |
DC_LF is digital downstream of DC, EPICS output is visible as "Power Monitor PD" on PSL_LASER MEDM. |
No | |
AC | 16.5k AC | 5k HPF nominal | H1:PSL-PWR_HPL_AC | No | ||||
ISS 1st loop diodes after PMC | ISS_PDA, ISS_PDB |
Inner loop diodes, D1001998 |
"Filt" on the board, "AC" on the box | 660 DC |
z=[0.0723;2700;0.0707] Hz, p=[3.3607;130;3.12;2300] |
H1:PSL-ISS_PDA and PDB |
No dewhite, output is calibrated in volts. |
No |
H1:PSL-ISS_PDA_DC and PDB_DC |
Digitally low-passed version of PDA and PDB, but has a DC gain of 5 so the DC agrees with the analog of "DC" output on the PD box. | Yes, from ISS | ||||||
H1:PSL-ISS_PDA_AC and PDB_AC | Dewhitened and AC-coupled version of PDA and PDB, has a gain to match PDA_DC and PDB_DC | Yes, from ISS | ||||||
H1:PSL-ISS_PDA_REL | AC-coupled RIN made by PDA_AC/PDA_DC. | Yes, from ISS | ||||||
DC on the box | 3.3k DC | N/A | N/A | |||||
Frontend output before HPO but after FI | PD_AMP | DC on the box | 20k DC nominal | H1:PSL-OSC_PD_AMP_DC | EPICS output visible as "FRONTEND POWER" on PSL_LASER MEDM. | No | ||
AC on the box | 100k AC nominal | 5k HPF nominal | AMP_AC | No | ||||
Back-propagation rejected by FI between frontend and HPO | PD_ISO | PSL monitor PD, D1002164, T100047 | DC | 750 DC nominal | H1:PSL-OSC_PD_ISO_DC | EPICS output visible as "PDISO" on PSL_LASER MEDM. | No | |
AC | 3.75k nominal | 5k HPF nominal | ISO_AC | No | ||||
Back-propagating HPO mode leaking from HPO cavity? | PD_INT | PSL monitor PD, D1002164, T100047 | DC | 1k? | H1:PSL-OSC_PD_INT_DC | EPICS output visible as "PDINT" on PSL_LASER MEDM. | No | |
AC | 5k? | 5k HPF nominal | INT_AC | No | ||||
HPO Brewster plate rejection | PD_BP | PSL monitor PD, D1002164, T100047 | DC | 1.5k nominal | H1:PSL-OSC_PD_BP_DC | EPICS output visible as "PDBP" on PSL_LASER MEDM. | No | |
AC | 7.5k nominal | 5k HPF nominal | BP_AC | No |
I cannot edit the above entry any more, so here is an additional table showing digital filters.
what | analog | channel | model | digital | ||
HPO output before AOM | DC | H1:PSL-PWR_HPL_DC | h1pslpmc | None | ||
H1:PSL-PWR_HPL_DC_LP | p=0.05 | |||||
AC | H1:PSL-PWR_HPL_AC | None | ||||
ISS 1st loop diodes after PMC |
"filt" or AC (DC-coupled) |
H1:PSL-ISS_PDA (and PDB) | h1psliss | cts/volt conversion factor | ||
H1:PSL-ISS_PDA_CALI_AC |
z= [0.0707, 0.0723], p= [0.3, 0.3] and 2nd order 0.3Hz Butterworth HP in addition to dewhite, DC gain of 5. |
|||||
H1:PSL-ISS_PDA_CALI_DC | Some random LPF (p=[0.034141, 0.037449, 10430]), DC gain of 5. | |||||
H1:PSL-ISS_PDA_REL | None | |||||
Frontend output before HPO but after FI | DC | H1:PSL-OSC_PD_AMP_DC | h1pslpmc | Gain of 0.00349223 | ||
AC | H1:PSL-OSC_PD_AMP_AC | Gain of 0.000613 | ||||
Back-propagation rejected by FI between frontend and HPO | DC | H1:PSL-OSC_PD_ISO_DC | Gain set to 1 on May 11 2016 (alog 27112) | |||
AC | H1:PSL-OSC_PD_ISO_AC | Gain of 1 | ||||
Back-propagating HPO mode leaking from HPO cavity? | DC | H1:PSL-OSC_PD_INT_DC | Gain set to 1 on May 11 2016 (alog 27112) | |||
AC | H1:PSL-OSC_PD_INT_AC | Gain of 1 | ||||
HPO Brewster plate rejection | DC | H1:PSL-OSC_PD_BP_DC | Gain set to 1 on May 11 2016 (alog 27112) | |||
AC | H1:PSL-OSC_PD_BP_AC | Gain of 1 | ||||
PMC TRANS | ? | H1:PSL-PWR_PMC_TRANS | Gain of 0.0103, p=0.15 | |||
PMC REFL DC | ? | H1:PSL-PWR_PMC_REFL | Gain of -0.0248015, p=0.15 |
ISS inner loop (or 1st loop) diode has different filter than written above, it turns out. But 130Hz was a zero, not pole. 2.7k was a pole, not zero.
effective trans impedance = 660 Ohm (that's 0.2*3.3k).
z=[0.0707; 0.0723; 130]
p=[3.12; 3.36; 2.34k; 2.70k]
Tagging DetChar, IOO, and ISC for future reference.
Seems like I was really, really tired, here's a correction of correction. Really sorry for the confusion.
My original table was correct.
Inner loop PD is equivalen of 660Ohm, zp=([0.0707;0.0723;2.7k],[3.12;3.36;130;2.34k]).
the Verbal Alarms code was logging to the ops home directory. Prior to the move of this home directory (WP5658) I have modified the code to log to a new directory: /ligo/logs/VerbalAlarms We restarted the program at 14:04 and verified the log files are logging correctly.
These verbal log files actually live one level deeper, in /ligo/logs/VerbalAlarms/Verbal_logs/ For the current month, the log files live in that folder. However, at the end of every month, they're moved into the dated subfolders, e.g. /ligo/logs/VerbalAlarms/Verbal_logs/2016/7/ The text files themselves are named "verbal_m_dd_yyyy.txt". Unfortunately, these are not committed to repo where these logs might be viewed off site. Maybe we;ll work on that. Happy hunting!
The Verbal logs are now copied over to the web-exported directory via a cronjob. Here, they live in /VerbalAlarms_logs/$(year)/$(month)/
The logs in /ligo/logs/VerbalAlarms/Verbal_logs/ will now always be in their month, even the curent ones.