Displaying reports 57481-57500 of 83348.Go to page Start 2871 2872 2873 2874 2875 2876 2877 2878 2879 End
Reports until 16:53, Wednesday 13 April 2016
LHO VE
gerardo.moreno@LIGO.ORG - posted 16:53, Wednesday 13 April 2016 (26581)
HAM1 CDS Signal Cable
Extended, routed and terminated CDS signal cable for HAM1 annulus ion pump controller.
H1 GRD
thomas.shaffer@LIGO.ORG - posted 16:45, Wednesday 13 April 2016 (26579)
Started BRS_STAT Guardian nodes

I started these nodes and will have them run overnight to see how they handle. The purpose of these nodes is to watch their respective BRS and report what state it is in, in the node's state (ie. if the damper is on, the state will be DAMPER_ON). In the future, these nodes will help the SEI configuration nodes to determine if the BRS is in a good condition to be used for sensor correction.

H1 SEI (SEI)
michael.ross@LIGO.ORG - posted 16:44, Wednesday 13 April 2016 (26578)
BRS EPICS Connections

We got the EPICS IOC running on the BRSY computer and now have a collection of EPICS channels which hold detailed information about BRSY. Below is a list of the channels with some brief descriptions. For more detailed descriptions along with troubleshooting guide see T1600103.

Channel List:
H1:ISI-GND_BRS_ETMY_DAMPTIMEOUT, damping time out in number of cycles, read/write
H1:ISI-GND_BRS_ETMY_AMPBIT, amplitude status
H1:ISI-GND_BRS_ETMY_BOXBIT, BRS electronics box status
H1:ISI-GND_BRS_ETMY_CBIT, C# running bit
H1:ISI-GND_BRS_ETMY_DAMPBIT, Damping state
H1:ISI-GND_BRS_ETMY_MODBIT, Beckhoff modules status
H1:ISI-GND_BRS_ETMY_USER, User damping logic control, read/write, (0 stops damping from ever turning on, 1 allows damping to turn if necessary)
H1:ISI-GND_BRS_ETMY_CAMERA, Camera status
H1:ISI-GND_BRS_ETMY_LIGHTSRC, Light source status
H1:ISI-GND_BRS_ETMY_TEMPL, Left temperature sensor in 0.01℃
H1:ISI-GND_BRS_ETMY_TEMPR, Right temperature sensor in 0.01℃
H1:ISI-GND_BRS_ETMY_VEL, Sqrt(velocity)
H1:ISI-GND_BRS_ETMY_HIGHTHRESHOLD, Damping high threshold, read/write, above which the damping turns on
H1:ISI-GND_BRS_ETMY_LOWTHRESHOLD, Damping low threshold, read/write, below which the damping timeout begins

Also, we've uploaded both the PLC code and the C# code to the SVN under slowcontrols.

H1 General
jeffrey.bartlett@LIGO.ORG - posted 16:15, Wednesday 13 April 2016 (26576)
Ops Day Shift Summary
Title:  04/13/2016, Day Shift 15:00 – 23:00 (08:00 – 16:00) All times in UTC (PT)
State of H1: IFO unlocked. HAM6 being pumped. Work on PSL is ongoing  
Commissioning: 
Outgoing Operator: N/A
 
Activity Log: All Times in UTC (PT)

15:00 (08:00) – Start of shift
15:44 (08:44) Christina & Karen – Going into LVEA for cleaning
15:52 (08:52) Kyle – Going into LVEA to move vacuum pump from north side of HAM6 
15:57 (08:57) Keita – Going to ISCT1 to do fit checking
16:09 (09:09) Peter – Going into LVEA to make measurements
16:14 (09:14) Gerardo – Going to Y-End to recover Pump cart
16:28 (09:28) Peter – Out of the LVEA
16:29 (09:29) Chris – Beam sealing on the X-Arm near the corner station
16:42 (09:42) Filiberto – Taking job shadows into CER
16:50 (09:50) Filiberto & Job shadows – Going to Mid-Y to prep for vacuum system changes
16:58 (09:58) Kyle – Out of the LVEA
17:05 (10:05) Gerardo – Back from End-Y
17:09 (10:09) Kyle & Gerardo – In LVEA craning the pump cart over the beam tube
17:15 (10:15) Peter & Jason – Going into the PSL enclosure
18:10 (11:10) Dale – Taking job shadows on LVEA tour
18:14 (11:14) John – Going to both mid stations to check property tags
18:38 (11:38) Dale – Out of LVEA
18:50 (11:50) Filiberto – Back from Mid-Y
18:52 (11:52) Filiberto – Going to Mid-X
19:06 (12:05) Dave & Jim – 	DAQ restart 
				Taking down FW0 for several hours to move disks
				Taking down NDS0 – May cause Guardian to crash	
19:15 (12:15) Filiberto – Back from Mid-X
19:19 (12:19) Kyle – Out of LVEA
19:29 (12:29) Jason & Peter – Finished in the PSL enclosure
19:31 (12:31) Jim – Restarting H0EPIC2 to fix a pegged CPU
19:49 (12:49) Jeff K. & Evan – Going to End-X to hunt for noise
20:51 (13:51) Krishna – Going to End-X for BRS code changes
21:40 (14:40) Filiberto – In Beer Garden working on Newtonian array
21:46 (14:46) Peter & Jason – In LVEA around PSL racks
21:55 (14:55) Chandra & John – In LVEA at GV3  
22:15 (15:15) Keita – Finished moving the ISCT6 table back into place at HAM6
22:18 (15:18) John & Chandra – Out of the LVEA
22:26 (15:26) Krishna – Back from End-X
22:58 (16:58) Jeff K. & Evan – Back from End-X


End of Shift Summary:

Title: 04/13/2016, Day Shift 15:00 – 23:00 (08:00 – 16:00) All times in UTC (PT)
Support: 
Incoming Operator: Nutsinee 

Shift Detail Summary: Chamber pump down continues at HAM6. The PSL team is working on a power stabilization problem located outside the PSL enclosure. Various other groups are taking advantage of the IFO being unlocked to address problems, upgrades, and fixes.  
LHO FMCS
john.worden@LIGO.ORG - posted 15:39, Wednesday 13 April 2016 (26575)
VEA/LVEA temperatures

The plot "VEAs" displays the average temperature for the two end station VEAs and the LVEA average (Zone_Control_AVerage)

These are 10 minute samples.

Note that the End VEAs consist of one zone while the LVEA has 8 zones (shown in plot LVEAzones - one minute samples)

Zonedef shows all the temperature sensors in the LVEA.

At LHO we do not control the zones individually (since disabling the SCR controls years ago) We control to an average Zone_Control_AVerage which averages most of the sensors in the LVEA with the exception of a few outliers. For example, sensor 3D, zone 3B, is excluded since it senses drafts from an exterior door near by.

 

Images attached to this report
H1 ISC
keita.kawabe@LIGO.ORG - posted 15:20, Wednesday 13 April 2016 (26574)
MCL PZT mirror assy on ISCT1

MCL PZT mirror assy was assembled except the mirror itself and was put at a random location on ISCT1. This is for POP-X.

H1 ISC
keita.kawabe@LIGO.ORG - posted 15:17, Wednesday 13 April 2016 (26573)
ISCT6 back in place (Jim, Genne, Keita)

ISCT6 was put back in place and reconnected to the chamber. Lexan plates were put in a bag and put on top of the table.

Richard and Fil are cabling up the table.

H1 PEM (CDS)
james.batch@LIGO.ORG - posted 12:38, Wednesday 13 April 2016 - last comment - 12:44, Wednesday 13 April 2016(26571)
Restarted h0epics2 and IOC's
Restarted h0epics2 to apply patches and to clear a CPU that was stuck at 100% usage.  Restarted IOC's for

h0tidal
h0fmcs
h0video
h1weatherey
h1weathermy
h1weathercs
h1weathermx
h1weatherex

Comments related to this report
james.batch@LIGO.ORG - 12:44, Wednesday 13 April 2016 (26572)
As it turns out, the h0tidal IOC is using 100% of a CPU core.  We will leave it off while investigating what is going on.
H1 DAQ
david.barker@LIGO.ORG - posted 12:18, Wednesday 13 April 2016 (26570)
frame writer 0 down for LDAS disk move from LSB to warehouse

two DAQ changes:

Put the h1susetm[x,y]pi systems back into the DAQ and restarted at 12:05PDT.

Shutdown h1fw0 and h1ldasgw0 systems for Dan's move of the LSB Q-Logic switches and SATA-BOY raids from LSB to warehouse. WP5828.

Strangely, after the DAQ restart for the reconfiguration, h1fw1 did not kernel panic crash. First time in many restarts this has not happened. Only difference is that h1fw0 is powered down.

H1 CDS (DAQ)
david.barker@LIGO.ORG - posted 11:46, Wednesday 13 April 2016 - last comment - 12:00, Wednesday 13 April 2016(26568)
Tuesday Maintenance Summary

EY Vacuum Controls Upgrade

Richard, Patrick, Jim, Dave:

Main work was the upgrade of EY from the VME to the Beckhoff based systems. Work done so far: running minute trends were ported from old to new names. Main MEDM overview screen almost converted. Cell phone alarm texter was upgraded, we see a slow data connection at EY (FRS 5287).

Remaining items: cleanup of MEDM overview, migrate archived min trend files, get target autoBurt.req completed, alh configuration change.

DAQ

Jim, Dave:

Around 6pm the DAQ became very unstable with both framewriters crashing. As a quick fix we took out the h1susetm[x,y]pi systems out of the DAQ. The final DAQ restart was at 18:14PDT, and h1fw0 did restart itself at 18:52PDT. This was a clean restart (not a kernel panic crash which h1fw1 is experiencing) and the DAQ was stable since then.

ETM PI models

Ross, Tega, Dave

Work is ongoing for end station SUS PI models inclusion of the new IWAVE code. We will start with h1susetmxpi.

 

Comments related to this report
david.barker@LIGO.ORG - 12:00, Wednesday 13 April 2016 (26569)

This morning while the DAQ is running sans SUS-PI, I manually restarted daqd on h1fw1. Unfortunately it did panic crash on restart of daqd, the console gave a bit more information:

kernel panic - not syncing: Fatal exception in interrupt

paging request at 0000010000000000000

Shutting down cpus with NMI

 

H1 CAL (CAL)
craig.cahillane@LIGO.ORG - posted 11:35, Wednesday 13 April 2016 - last comment - 09:12, Wednesday 27 April 2016(26566)
All of O1 LHO Statistical Uncertainty Spectrogram
C. Cahillane

I have produced statistical uncertainty spectrograms for all of O1.

For the most part the uncertainty doesn't change much over all of O1.  The biggest concern is a couple days around Nov 17th with large kappa variations.  Again, Jeff has suggested that I detrend all of the kappas to eliminate this spike in uncertainty.  

I believe that this is good evidence that the statistical uncertainty over all of O1 is fairly constant.  

For the LLO statistical uncertainty spectrograms, please see LLO aLOG 25652.
Non-image files attached to this report
Comments related to this report
craig.cahillane@LIGO.ORG - 09:12, Wednesday 27 April 2016 (26818)
C. Cahillane

I have detrended the kappas and reproduced the above spectrograms without the massive spikes of uncertainty.
Non-image files attached to this comment
LHO VE
kyle.ryan@LIGO.ORG - posted 10:44, Wednesday 13 April 2016 (26565)
0930 hrs. local -> Moved pumping from HAM5 to HAM6
Path is clear to reconnect table to North door of HAM6
H1 ISC (CDS)
evan.hall@LIGO.ORG - posted 09:57, Wednesday 13 April 2016 (26548)
EY ESD voltage noise measurements

Fil, Richard, Craig, Evan

Summary

We measured the voltage noise on the EY ESD in the nominal low-noise configuration, close to the flange. The measured noise is too small to impact DARM.

Above 50 Hz, the noise of each quadrant electrode relative to the bias electrode is about 25 nV/Hz1/2. At the nominal bias (380 V), this implies a white force noise at the test mass of 1.4 fN/Hz1/2, which amounts to 6×10−23 m/Hz1/2 at 100 Hz.

Measurement details

Based on a design by Rai (T1600088), Richard built a passive box which picks off the voltages going to the ESD and ac couples them with 5 µF capacitors (see attached image). This enables us to pick off the bias voltage and a particular quadrant voltage, ac couple them, and then differentially amplify them with a dc-coupled SR560. The 5 µF works against the 100 MΩ impedance of the SR560 to give a high-pass corner of about 0.3 mHz. The SR560 gain was 100, with an input-referred voltage noise of 4–6 nV/Hz1/2 above 10 Hz.

We installed the passive box after the current-limiting resistor box, which sits in the cable tray close to the cable feedthrough on the BSC.

We took two kinds of measurements.

First, we had the ESD signal pass through the passive box and into the chamber to the reaction mass electrodes. The bias electrode was held at 380 V. We measured the ac-coupled signal differentially between the bias signal and a particular quadrant signal. This measures the voltage noise being applied to the electrodes. On each quadrant, we had a calibration line running at 35 Hz, with an amplitude of a few hundred DAC counts.

Second, we disconnected all five driver signals before they entered the passive box, but left the connections to the chamber alone. We again measured the ac-coupled differential signal between the bias and the quadrant (LR only). This measures the voltage noise between the electrodes.

Results

The attached plot shows the results of the two measurements for LR. For the configuration with the driver connected, we also checked the other three quadrants and the spectra looked almost identical. We also briefly tried injecting band-limited white noise from 0.8 to 8 Hz, just to see if exercising the DAC had an effect on the noise floor above 50 Hz (it didn't).

We would like to take measurements on EX in its low-noise configuration, as well as with the driver disconnected.

Images attached to this report
Non-image files attached to this report
LHO VE
chandra.romel@LIGO.ORG - posted 09:26, Wednesday 13 April 2016 (26564)
IP5 PS
IP-5 power supply was giving a polarity error since Friday. Suspect this was due to receptacle activities at rack last Friday. Reprogrammed PS for "spare" pump with LIGO specific parameters. One channel fired up. The other gave an "over temperature" error. Waited many minutes, raised voltage from default stepping 3000V to 5000V on fixed V setting. Second channel started to work again (external fan is blowing on it). We are ordering more Gamma PSs as these old Varians are failing at a fast rate.

H1 General
bubba.gateley@LIGO.ORG - posted 07:11, Wednesday 13 April 2016 (26563)
Beam Tube Cleaning
The beam tube cleaning was completed last week. I am at LLO now and will post the final test results when I return next week.
H1 PSL
peter.king@LIGO.ORG - posted 05:54, Wednesday 13 April 2016 - last comment - 06:08, Wednesday 13 April 2016(26561)
Changed FSS Autolocker settings
As a test I changed the FSS autolocker settings.

MIN [K] from -0.2000 to -0.0150
MAX [K] from 0.0000 to 0.0100

A fringe occurred when the NPRO crystal temperature was somewhere between -0.0130 and -0.0140.
I reduced the autolocker temperature search ramp range so that hopefully the autolocker won't
spend so much time hunting for the fringe.  Engaging the autolocker did not knock the FSS out
of lock.

It might be that over time the NPRO crystal temperature will exceed -0.0150, in which case the
autolocker settings may need to be changed.
Comments related to this report
peter.king@LIGO.ORG - 06:08, Wednesday 13 April 2016 (26562)
Attached is a plot of the NPRO crystal temperature for when the FSS was locked.  So it might be that the
minimum temperature can be set to -0.035 in case the autolocker cannot find the fringe with the current
(ie modified) settings.

/* standard disclaimer */
Past performance is not an indicator of future results.
Images attached to this comment
H1 ISC (TCS)
kiwamu.izumi@LIGO.ORG - posted 02:38, Sunday 03 April 2016 - last comment - 11:10, Thursday 14 April 2016(26409)
DARM cavity pole reaching 362 Hz

Related alogs 26264. 26245

I did some follow-up tests today to understand the behavior of the DARM cavity pole. I put an offset in some ASC error points to see how they affect the DARM cavity pole without changing the CO2 settings.

I conlude that the SRC1 ASC loop is nominally locked on a non-optimal point (when PSL is 2 W) and it can easily and drastically changes the cavity pole. The highest cavity pole I could get today was 362 +/- a few Hz by manually optimizing the SRC alignment.


[The tests]

This time I did not change the TCS CO2 settings at all. In order to make a fair comparison against the past TCS measurements (26264, 26245), I let the PSL stay at 2 W. The interferometer was fully locked with the DC readout, and the ASC loops were all engaged. The TCS settings are as follows, TCSX = 350 mW, TCSY = 100 mW. I put an offset in the error point of each of some ASC loops at a time. I did so for SRC1, SRC2, CSOFT, DSOFT and PRC1. Additionally, I have moved around IM3 and SR3 which were not under control of ASC. All the tests are for the PIT degrees of freedom and I did not do for the YAWs. During the tests, I had an excitation line on the ETMX suspension at 331.9 Hz with a notch in the DARM loop in order to monitor the cavity pole. Before any of the tests, the DARM cavity pole was confirmed to be at 338 Hz by running a Pcal swept sine measurement.

The results are summarized below:

The QPD loops -- namely CSOFT, DSOFT, PRC1 and SRC2 loops -- showed almost no impact on the cavity pole. The SOFTs and PRC1 tended to quickly degrade the power recycling gain rather than the cavity pole. I then further investigated SRC1 as written below.

 

[Optimizing SRC alignment]

I then focused on SRC1 which controlled SRM using AS36. I switched off the SRC1 servo and started manually aligning it in order to maximize the cavity pole. By touching PIT and YAW by roughly 10 urads for both, I was able to reach a cavity pole of 362 Hz. As I aligned it by hand, I saw POP90 decreasing and POP18 increasing as expected -- these indicate a better alignment of SRC. However, strangely AS90 dropped a little bit by a few %. I don't know why. At the same time, I saw the fluctuation of POP90 became smaller on the StrioTool in the middle screen on control room's wall.

In order to double check the measured cavity pole from the excitation line, I ran another Pcal swept sine measurement. I confirmed that the DARM cavity pole was indeed at 362 Hz. The attached is the measured DARM sensing function with the loop suppression taken out. The unit of the magnitude is in [cnts @ DARM IN1 / meters]. I used liso to fit the measurement as usual using a weighted least square method. 

By the way, in order to keep the cavity pole at its highest during the swept sine measurements, I servoed SRM to the manually adjusted operating point by running a hacky dither loop using awg, lockin demodulators and ezcaservos. I have used POP90 as a sensor signal for them. The two loops seemingly had ugf of about 0.1 Hz according to 1/e settling time. A screenshot of the dither loop setting is attached.

Images attached to this report
Comments related to this report
daniel.sigg@LIGO.ORG - 02:58, Sunday 03 April 2016 (26410)

Probably interestinmg to take a look at ASC_ASA/B_36/90/DC, and see, if there is a better combintion available.

jenne.driggers@LIGO.ORG - 11:39, Friday 08 April 2016 (26497)

It occurs to me that we might try putting some offsets into the centering loops for the SRC WFS.  Can we find a pointing location where the AS36 signals give us an optimal alignment for the SRC? 

On a somewhat parallel thought, Evan and I wonder if we could set offsets in the SRC1 loops after choosing an alignment based on some dither lines?  Maybe we don't want always-on dither lines, but we could use them to help us figure out what our optimal alignment is.

kiwamu.izumi@LIGO.ORG - 13:34, Wednesday 13 April 2016 (26567)

Here are some more data.

In this plot, full lock was achieved at some point between 0 and 500 sec. A small change in the SRM alignment offsets are due to the DRMI guardian completing the ASC offload to the top mass before decreasing the CARM offset. The measurement of the cavity pole and optical gain is valid only after 500 sec or so.

As I mentioned in the last ISC call, the cavity pole frequency and optical gain are anti-correlated -- one goes up and the other goes down.

The below shows a summary of my manual SRM alignment.

  Before  After  Difference (after - before)
SRM PIT -727 urad  -737 urad  -10 urad
SRM YAW  908 urad  901 urad  -7 urad

As I wrote in the original entry, I steered SRM PIT and YAW by -10 and -7 urad respectively.

 

Also I attach a screen shot of trends showing the 2f RF signals during the same period.

As the cavity pole increases the POP90 consistently decreases. This is what we expected because SRC sucks more light into it. POP18 also increased at the beginning which is good. However it decreased slightly after I aligned SRM yaw for some reason. The most outrageous one is AS90. As the cavity pole increased, the AS90 kept decreasing. I have no idea why.

Images attached to this comment
kiwamu.izumi@LIGO.ORG - 18:40, Wednesday 13 April 2016 (26583)

Conclusion (again): it is the SRC alignment that changes the cavity pole.

[SRM and SR2 alignments]

I completely forgot about the SRC2 loop which controls the pointing of the output beam on to ASC_AS_C. This loop was active during my measurement silently correcting SR2 and SRM as I manually moved SRM. So I checked the witness sensors to see how much they actually moved instead of looking at my adjustment of the SRM alignment.

As you can see, SRM actually moved to the opposite direction in its angles due to the SRC2 loop counteracting on my adjustment. In total they have moved by the amounts listed in the table below.

   before  after  difference (after-before)
SRM pit  -105 urad  -95 urad  10 urad
SRM yaw  873 urad  876 urad  3 urad
SR2 pit  2603 urad  2600 urad  -3 urad
SR2 yaw  790 urad  791 urad  1 urad

 

[A finesse simulation also suggests that the cavity pole is a strong function of SRs' alignment]

With the above misalignment values in hand, I then ran a finesse simulation to see if I can reproduce a similar result. Indeed, I could change the cavity pole from an optimum of 366 Hz to 344 Hz in the simulation (while my measurement was from 360-ish Hz to 345-ish Hz). The attached is a simulated DARM response with and without these misalignment.

Because I was too lazy to fit out the effect of the time delay and next FSR peak, I simply searched for a frequency point where the phase rotates by 45 deg as a cavity pole frequency. This probably makes the absolute calibration of the cavity pole somewhat inaccurate, but the difference between the two cavity pole frequencies should be moreorless accurate.

Also I attach the finesse code in pdf format.

Images attached to this comment
Non-image files attached to this comment
kiwamu.izumi@LIGO.ORG - 11:10, Thursday 14 April 2016 (26591)

Addendum:

In the finesse simulation, the DARM response showed some difference at low frequencies between the two results. So I re-ran the same code and extended the frequency range to 0.1 Hz. It is seemingly due to a radiation pressure effect. I don't have a good explanation why it changed by SRs' alignment.

Images attached to this comment
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