J. Kissel

While in the systems meeting today, we'd wondered if the PSL IO Chassis had any spare DAC channels available for use with the newly planned ISS 2nd loop upgrade (see D1600175). Though a PSL DAC channel list is available (see T1200092), it's not really organized to nicely answer the question. As such, I've gone through the PSL front-end simulink models in an attempt to better answer the question. In summary, there are 11 spare DAC channels, some of which are grouped in such a way that they might have independent AI chassis spigots such that installation of new channels for the proposed upgrade to the ISS Second Loop electronics should be easy. 

There are 4, 16 channel DAC cards in the PSL IO chassis. 
On DAC 0 (card_num=0), which is nominally the ISS DAC card, there are no spare channels.
On DAC 1 (card_num=1), which is nominally the FSS DAC card, there are SIX spare channels.
On DAC 2 (card_num=2), which is nominally the PMC DAC card, there are FIVE spare channels.
On DAC 3 (card_num=3), which is nominally the DBB DAC card, there are no spare channels.
Note I say that these DAC cards "nominally" associated with a given function and/or top-level front-end model, but there are many other instances (namely SEI and SUS models) where not only are there multiple DAC cards in a given model, but there even instances where different models share (obviously different channel on) the same DAC card.

The spare channels are specifically (where channel counting starts from 0)
DAC_1_8
DAC_1_9
DAC_1_10
DAC_1_11
DAC_1_13
DAC_1_14

DAC_2_0
DAC_2_12
DAC_2_13
DAC_2_14
DAC_2_15

I attach a full list of the DACs channels identified by their channel names (which hopefully is a good enough proxy for their use). I would attach screenshots of the models, but the output ports are labelled too poorly at the top level for it to be helpful.

PS. This is the first time I've had to look at these PSL models: 
- There are lots of wasted channels (many cases of EPICS records being fed into full filter banks -- likely just to get a fast-channel test point -- the need for which I don't understand). Cleaning this up would likely make a non-negligible impact on the model speed. Admittedly, only DBB model is running close to its limit using ~70% of clock-cycle for computation.
- the labelling of input and output ports makes following signal paths very difficult
- the use of buses and tags would greatly improve the readability of the diagrams
In short, it appears that these models just haven't taken advantage of any of the modern RCG features and experience to improve efficiency and legibility.

ISCT1 Mad City Labs (MCL) PZT Driver (for POP AIR) Moved 

This Driver was on the south (crane coordinates) end of enclosure roof.  It was moved to the north side.  This required making a new Power cable (Thanks Manny/Fil) & barrel-ed some BNC extensions to the BNC.  I did not touch the DB9 cables, but they are labeled and dangling out of the south wall for now.

Covering ISC/IO Enclosure Holes (this was done yesterday)

Peter K asked me to cover some small holes on the ISCT6 Enclosure.  I went ahead and checked all the enclosures and covered holes with foil tape to the best of my abilities (so some roof panels and some chamber-side panels might have been passed over, but as noted, these are small holes.)

The IMs in HAM2 shift alignment after the HAM2 ISI trips, and as part of my investigation into the alignment shifts, I counted the number of ISI trips in a year.

Interestingly enough, Hugh and I both estimated 20-25 ISI trips in a year, however the number is much higher, at 94.

What I also discovered that in Commissioning Mode, the ISI trips an average of 10 times / month, while during the O1 run, the ISI trips an average of 5 times / month.

Since H1 was not vented, it's expected that the IM alignment shifts will continue through O2, and we can expect 5 times / month while in the science run.

The h1asc model was rebuilt and restarted this morning to correct a channel naming issue, then the DAQ was restarted at 9:32.

SEI - nothingn to report. Hugh and Jim waiting for wind to pick up to work on filter blends.

PSL - back up after another chiller failure

VAC - nothing to report

CDS - no work to do on the floor today. There will be an ASC FE and DAQ restart at some point today

FAC - cleaning at MX this morning. Beam tube sealing is ongoing

COMM - modifying POP B photodiode in EE Lab

Attached are two files showing the warm up phase of the pre-stabilised laser, after finding the laser was
off due to a chiller fault - as noted in Jeff's entry from last night.

    It takes the pre-modecleaner about 10-15 minutes to warm up and come to its final alignment, during
which the transmitted power slowly increases.  Other powers follow suit.  One can also see that as the
pre-modecleaner settles in, the beam position as monitored by the power stabilisation quadrant photodiode
slowly settles in too.

Title:  05/17/2016, Evening Shift 23:00 – 07:00 (16:00 – 00:00) All times in UTC (PT)
State of H1: IFO locked at DC_READOUT with 2w of power.   
Commissioning: Several commissioning tasks underway.
Outgoing Operator: Ed
 
Activity Log: All Times in UTC (PT)

23:00 (16:00) Start of shift
23:45 (16:45) Sheila & Haocun – Going to IOTC1
00:10 (17:10) Sheila & Haocun – Out of LVEA
01:01 (18:01) Sheila & Haocun – Going to IOTC1 
01:43 (18:43) Sheila & Haocun – Out of the LVEA
01:46 (18:46) Sheila & Haocun – Going to IOTC1
02:18 (19:18) Sheila & Haocun – Out of LVEA
02:25 (19:25) Sheila & Haocun – Going to IOTC1
02:53 (19:53) Sheila & Haocun – Out of LVEA
03:17 (20:17) Sheila & Haocun – Going to IOTC1 
03:22 (20:22) Sheila & Haocun – out of LVEA
05:19 (22:19 Lost Lock – PSL down with Crystal Chiller flow sensor error


End of Shift Summary:

Title: 05/17/2016, Evening Shift 23:00 – 07:00 (16:00 – 00:00) All times in UTC (PT)
Support: Jenne, Sheila, Haocun, Evan
Incoming Operator: N/A 

Shift Detail Summary: IFO has been mostly locked at various stages during the evening shift while commissioning work ongoing. At 05:19 (22:19) Lost Lock due to flow sensor error on PSL Crystal Chiller. Commissioners going home for the night.  

   At 05:19 (10:19) Lost lock due to PSL shutdown. X-Chiller down with Flow Sensor error.  

Haocun, Sheila, Keita, Jenne

We spent some time today on the POP X path, hoping that we can use this to avoid the locklosses we had last night due to sign flips in the REFL WFS signal for PR3.  

• First Haocun added a 50/50 beamsplitter to the POP air path, which reduced the light on both the POPAIR A and B diodes.  This means we don't have to be afraid of damaging POPAIR B at 50 Watts.  She then realigned both of these diodes, although we haven't checked the camera.  Jenne increased the whitening gain to account for the factor of 2, and redid the dark offsets so that we could relock PRMI.  With PRMI locked Haocun and I aligned the rest of the path to POP X, which is about 5 inches shorter than the path at LLO based on the table diagram.
• We had some trouble using the MCL PZT, with help from Keita we understood that the problem was with using long d sub cables.  Apparently, the sensors used in the internal piezo servo don't work if the cables are too long.
• Once the PZT was working, we designed a simple servo 1/f with a ugf around 1.5 Hz and the centering loops locked up imediately.  Haocun has open loop gain measurements that she will add.  
• We then quickly looked at phasing the RF by dithering PR3 pitch.  The laser turned itself off while we were doing this.   

Looking at the centering servo, Daniel and Keita realized that it would be nice to modify the model to have the same kind of integrator and triggering we have for the end station PZT servos, and modified the model.  It would be good to restart the ASC model to incorporate these changes, which will require a DAQ restart so we didn't do it tonight.  I cleaned up SDF so that it is ready to go if there is a convient time in the morning.  

[Sheila, Jenne]

These are numbers pulled from our dP/dTheta measurements from last night (mentioned in alog 27235).  I have gotten the numbers into RIN/theta, since we want to know how much the power fluctuates for a given angular motion of an optic.  The short summary is that the Yarm optics affect the power fluctuation much more significantly than the Xarm optics do, and that the ETMs affect the power more than the ITMs. 

Sum up of 2W results:

We'd like to remeasure these values at different powers - hopefully they're constant.  Of course, these are relative power fluctuations versus angle, so the overall force on the optics will be increasing as we increase the power.

The following table with more detailed results has a crazy-town amount of information, some of which I'm not totally sure what to do with yet.  The difficulty is that since we have ASC loops running, when we dither one test mass, all 4 test masses move.  So.  Here's the gory detail.  All dithers were at 0.51 Hz in pitch to the L2 stage of the test masses. Start times are UTC of 17 May 2016. The values in the table below are at our 0.51 Hz dither freq.  The numbers in the summary table above are the RIN of POP_A_LF versus the angular motion of the optic we were driving at the time.

To facilitate PI damping work with the EX ESD, I modified the guardian so that the driver is switched to low-noise mode in the noise tunings state. I also added code in the down state to go back to high-range mode after a lock loss.

Betsy, Jeff, Jim:

model changes for h1susmc[1,2,3], h1suspr[m,2] and h1sussr[m,2].

Richard, Jim:

powered down h1isce[x,y] for IO Chassis DC power reconfiguration.

Tega, Ross, Dave:

iWave C-code testing on h1susitmpi and h1susetmxpi models. No DAQ restart required.

Jenne, Sheila, Jim, Dave:

Clean load of h1asc filter modules to clear out corrupted archived file.

Jeff, Dave:

modified filter files for h1susitm[x,y] and h1susetmx were loaded, no real filter change just a reordering of the modules list. h1susetmy had filter changes, which Jeff loaded after review.

Jim Dave:

DAQ restart to sync sus model changes. H1EDCU_HWS.ini file was modified to remove ETMY channels which no longer exist in the new python hws code. DAQ EDCU is now GREEN again and operators should investigate if it goes RED.

Patrick:

conlog reconfigured to latest channel list.

J. Kissel

We've gathered our regular Tuesday measurement of the effective bias voltage as a result of charge on the end test masses. After the hiccup of settings loss a few week's ago (LHO aLOG 26793), the last three weeks of results confirm that both test masses are back on there way to zero effective bias voltage. Good! 

Also encouraging, is that the rate of charge accumulation seems to have become consistent between flips of requested bias. This didn't always used to be the case; see LHO aLOGs 22135 or 20387 in which we had evidence that the rate of charge was a crap shoot every time we flipped the requested bias sign. There's no obvious reason why it would be different between now and then, but it's good to see that it may be one less thing we have to worry about.

However, recall, the plan -- to minimize time-dependent calibration error during observing runs: after we've brought the effective bias voltage to zero, regularly flip the requested ETM bias voltage such that it *stays* at zero and never accumulates. Today's results show that we're pretty darn close to zero with ETMY, so we should write that script that automatically flips the requested bias voltage and takes care of all the collateral damage (see LHO aLOG 26826) this week or next, and exercise it. 

Only after we regularly exercise flipping and confirm nothing goes suddenly bonkers, will we say we're comfortable doing it regularly during the run.

J. Kissel, B. Weaver
Work Permit: #5880
FRS Ticket: #5489
Integration Issue: #FRS 5506
ECR: E1500045

Betsy and I've installed the individual coil driver switching of HSTS M3 stages as per documentation linked above. The front-end model changes were prepared and described yesterday (see LHO aLOG 27223), though note, we found some bugs and have to recompile again this morning (LHO aLOG 27239), after making the MEDM screen modifications described in the this log.

We've made modifications to the following MEDM screens:
/opt/rtcds/userapps/release/sus/common/medm/hxts/
M       SUS_CUST_HSTS_OVERVIEW.adl         <--- made CD STATE and TEST/COIL ENABLE settings and readbacks for each quadrant independent, 
                                                and linked to new non-generic HSTS screens mentioned below
and created new screens:
/opt/rtcds/userapps/release/sus/common/medm/hxts/
?       SUS_CUST_HSTS_M3_EUL2OSEM.adl      <--- used to be generic with all HXTSs, but now specific to HSTSs
?       SUS_CUST_HSTS_BIO.adl              <--- used to be generic with all HXTSs, but now specific to HSTSs
and screen shots of each are attached. 

Unfortuanely, because the BIO settings and EUL2OSEM matrix elements are new channels for the M3 stage, one has to, by-hand, re-enter every suspension's
    - Requested coil driver state
    - The TEST/COIL ENABLE switch
    - The M3 EUL2OSEM matrix elements.
and then hit "LOAD MATRIX" on all of the M3 EUL2OSEM matrices. We used Betsy's screenshot from last night to do this (from LHO aLOG 27225).


We've also made our best attempt at updating the safe and down.snap files which had to have the former, ganged BIO channels replaced with the individual coil BIO channels. This required quite an SDF dance:
1) On SDF SAVE SCREEN for each SUS, 
    - change SAVE TABLE to "EPICS DB TO FILE" in order to update the snap file with the new epics database channel list currently running with the new model
    - change FILE OPTIONS SELECTION to "OVERWRITE" in order do this with the currently loaded snap file
    - Hit SAVE FILE
    (We did this with every safe, down, or observe snap file for a given suspension)
2) On SDF RESTORE SCREEN for each SUS,
    - SELECT REQUEST FILE that you want to load in with the new updates
    - LOAD TABLE
    This should cleared out any of the channels with have disappeared from the model and create a bunch of new channels which are NOT INITitallized.
Since keeping track of all of these channels and snap files was a bear, I don't promise that we've gotten everything right. We'll just have to keep an eye on them over the next few weeks to check if we've missed anything.

Jenne's working on updating all Guardians that controlled the M3 stages of the HSTSs, and coding up the 3-coil-motion necessary for switching the coil state one at a time like is done on the beam splitter. 

Jenne, Sheila, Evan, Kiwamu

Today we aimed to have a long stable lock at 30 Watts. We did have one lock of more than half an hour at 30 Watts, which we lost due to commisioner error.

• We measured the coupling of test mass pitch to arm power fluctuations.  More information will be coming later. 
• We noticed that we can loose lock because of the CSOFT instability driven by power fluctuations when we power up too quickly for our soft loops to keep up.  We rewrote the INCREASE POWER state to pause and wait for soft loops at 10 Watts intervals.
• In 3 out of our last 4 locking attempts, we have lost lock in DARM offset.  The one time we made it Jenne did the steps in the guardian by hand.  There don't seem to be any changes in the code for this state....
• We had a few locklosses engaging the ISS 2nd loop.  The thresholds needed to be adjusted, now it is working.
• We did some A2L tuning today.
• We had a couple of sudden locklosses, where our recycling gain was slowly decaying, and it looks like the PR2 (REFL WFS) loop and SRC2 (AS_C to SR2 and SRM) loops ran away in the last fractions of a second.  This seems like the lockloss we had because of the sign flip in the REFL WFS, because we increased the bandwidth of the PR2 loop it is now a fast lockloss.  We measured the open loop gain of PRC2 both at 30 Watts (where the recycling gain is decaying) and at 2 Watts, the optical gain is lower at the 30 Watts measurement which was taken right before one of these locklosses. 
• We decided based on this to try moving soft loop offsets, but we want to picomotor the TMSY QPDs before moving the offsets...  we are leaving this for tomorow...  We turned off the CHARD blends so that we can move picomotors, and are leaving them off for now, but should turn them back on when we are done with picomotors.

Also, the ISS 1st loop is oscillating pretty much every time we loose lock and needs to be fixed by hand. we are leaving IFO undisturbed at 23 Watts 7:50 UTC

BP

Following Friday night's lock, I looked at the spectrum and saw some regular structure, looking like a 2Hz comb at odd frequencies.This looks like a new comb. [figs 1&2]

As followe up, I ran coherence with all of the EBAY magnetometers and saw strong coherence is some places with this 2Hz comb, as well as the persisting 0.5Hz comb (see plots below)

0.5Hz comb: https://ldas-jobs.ligo.caltech.edu/~brynley.pearlstone/comb_investigations/May_2016_comb/H1:PEM-EX_MAG_EBAY_SEIRACK_Z_DQ_25_40Hz.png

0.5Hz comb + 2Hz comb: https://ldas-jobs.ligo.caltech.edu/~brynley.pearlstone/comb_investigations/May_2016_comb/H1:PEM-EX_MAG_EBAY_SEIRACK_X_DQ_25_40Hz.png

Note: These two are the same magnetometer (MAG_EBAY_SEIRACK), looking at 2 different axes. Both combs were also seen in other magnetometers.

Full list of plots: https://ldas-jobs.ligo.caltech.edu/~brynley.pearlstone/comb_investigations/May_2016_comb/

Previous efforts to mitigate the 0.5Hz comb was focussed on powering the timing card independently in the CS EBAY LSC-C! I/O chassis which handles DARM. This has not worked to eliminate the comb. I can't report any reduction yet, as Friday's lock was not sensitive at low (<100Hz) frequencies.

This 2Hz comb on 1Hz offset is the transform of a 1Hz square wave. The 2Hz comb might have to do with the 0.5s and 1s structure seen it Keith's data folding studies here: https://alog.ligo-wa.caltech.edu/aLOG/index.php