Displaying reports 55641-55660 of 84573.Go to page Start 2779 2780 2781 2782 2783 2784 2785 2786 2787 End
Reports until 22:13, Thursday 15 September 2016
H1 ISC
terra.hardwick@LIGO.ORG - posted 22:13, Thursday 15 September 2016 - last comment - 11:59, Friday 16 September 2016(29747)
PI 3 hour 50W lock status

Matt, Terra

Status of PI after TCS work and ring heater change transient (for at least the first three hours of 50 W lock):

  1. Successfully damping all modes (with some caveats; see #4,5.)
  2. Actively damping ITMX 15520, ITMY 14980 and 15515, ETMX 15541 and 15008, ETMY 15542, 15009, 18041 and 18059 Hz. Of these, the 18kHz and 15kHz only ring up during the transient. 
  3. All modes are now getting damped using the PLL. One motivation for this is avoiding saturations. I'm fairly certain that the mysterious sign flips and illogical behavior when increasing gain in the past have been due to something saturating along the loop, usually resulting in ringing up the mode. 
  4. 15009 Hz (MODE 26) is still a bit confusing: it rings up twice during the transient period and appears to require a sign flip to damp each time. I'm not yet convinced this isn't just a byproduct of the transient though (we flip a gain sign and see a slow downturn on the same timescale as the transient passing, attributing the turn around to the wrong reason?). 
  5. After ~2 hours, 15541/2 Hz (MODE 17/25) ring up. While we have the actuation strength to damp these, these modes are ~.5 Hz apart, so the PLL is having trouble staying on the right one and I had to do lots of actively jumping back and forth between controls. We are going to try sending both drive signals to both optics, etc. 

3 hours into the lock and all PI's are stable. Leaving PI control with Matt for the night. 

Comments related to this report
matthew.evans@LIGO.ORG - 03:43, Friday 16 September 2016 (29752)

Another 3 hour lock and similar PI story.

  • Mode 2 (15520 Hz on IX) is our poster child for PI damping.  It is clearly unstable without a damping loop, but the damper keeps it down nicely.
  • Mode 26 (15009 Hz on EY) has a sign flip near the start of the lock.  The PLL_PRE_OFFSET is currently set to try to avoid problems (keeps the feed back off until it is needed, which means that the sign can be wrong and the damper won't drive up the mode).
  • Modes 17 and 25 (15541.1 and 15541.9 Hz on EX and EY) were problematic (see plots).  They are very close in frequency, and they ring up at the same time, so the PLLs both have the same input and tend to both lock on the same mode (most often 15541.1).  I tried to address this by moving MODE17_PLL_SET_FREQ to 743 (which aliases/images to 15543) and clearing the MODE17 PLL integrator (FREQ_FILT2) when both PLLs locked on the same mode.  This seemed to work, so finally I changed the SUS_PI guardian to make it not enable the MODE17 integrator.  After this the modes did not ring up, but I don't think the relationship was causal.  We should look at making linear combinations of TRX and TRY to separate these modes in the sensing.  (I think Carl had done this with some success in the past.)
Images attached to this comment
terra.hardwick@LIGO.ORG - 11:59, Friday 16 September 2016 (29762)

These modes shift very little in frequency during a lock stretch (see attached). I've tightened up the individual band passes quite a bit (~1 Hz) to see if that helps next lock. Still need to check lock to lock variation.

Images attached to this comment
H1 CAL (CAL)
darkhan.tuyenbayev@LIGO.ORG - posted 22:03, Thursday 15 September 2016 - last comment - 18:22, Wednesday 21 September 2016(29744)
Testing coherence calculation w/ different averaging parameters

Kiwamu I, Jeff K, Darkhan T,

Overview

Today we looked at the calibration line coherence values calculated in the front end. We discovered that in the front-end model with the currently used averaging parameters the coherence value is updated once every 10 seconds (first 1.5 minutes in Fig. 1).

We propose modifying the averaging code to improve coherence calculation and avoid potential aliasing (see details).

Details

A front-end model that calculates coherence uses N data points taken every Scycles computational cycles to calculate cross-spectral density of the signals. Scycles is controlled by an EPICS record $(IFO):CAL-CS_TDEP_COH_STRIDE (or simply STRIDE): Scycles = FE_RATE * STRIDE. There are drawbacks associated with this approach:

We can deal with the first problem listed above by reducing STRIDE. On Fig. 1 we show coherence values for N = 10 and STRIDE set to 10, 5, 1, 1/16 and again 1. Notice that this test was done when the IFO was not locked, thus we do not expect a coherence of ~1. When STRIDE is set to 1/16, we can see that the number of averages must be increased in order to include actual fluctuations in the signals (in the last 2.5 minutes N = 120).

Fig. 1

Several minutes later IFO locked (at t = -5 in Fig. 2) and the coherence became ~0.8. After we set the line amplitude to its nominal value we got coherence of ~1.

Fig. 2

Next, to avoid aliasing we should use all data points (equivalent to setting STRIDE = 1/FE_RATE in the current code) and increase N accordingly. Thus to integrate over 10 seconds and avoid aliasing the current code will require O(FE_RATE * 10) = O(160k) operations per cycle and a buffer for 160k values, which is unnecessary expensive.

A following minor modification of the averaging code can solve the issue described above. Instead of adding every Scycles'th data point into the averaging buffer, we could insert an average of Scycles values. E.g. buffer_and_average() can be modified as follows:

...

    static int mini_sum = 0;

...

    //Increment cycle count
    mini_sum += data;
    cycle_counter++;
    if (cycle_counter >= cycles_between_data) {
        buffer[current_pointer] = mini_sum / ((double) cycles_between_data);
        current_pointer++;
        cycle_counter = 0;
        mini_sum = 0;
    }

...

With this modification and N = 160, STRIDE = 1/16 (Scycles = 1024), the coherence will be calculated with 10 second integration and will require O(160) operations per cycle, and the coherence value will be updated every 1/16 of a second.

Images attached to this report
Comments related to this report
darkhan.tuyenbayev@LIGO.ORG - 16:54, Wednesday 21 September 2016 (29887)CAL

Jeff K, Kiwamu I, Joe B, Darkhan T,

The modifications suggested above have been implemented at LHO (the modification was implemented during a bug fix, LHO alog 29876). The modifications also include an increased max buffer size:

...

#define MAX_SIZE 256

...

    static double mini_sum = 0;

...

    //Increment cycle count
    mini_sum += data;
    cycle_counter++;
    if (cycle_counter >= cycles_between_data) {
        buffer[current_pointer] = mini_sum / ((double) cycles_between_data);
        current_pointer++;
        cycle_counter = 0;
        mini_sum = 0;
    }

...

The changes have been committed to cds_user_apps repository, r14301.

Following is how coherence was calculated for locked but with high noise floor at lower frequencies (see attached displacement ASD during this measurement), so only PCAL_LINE2 (at 331.9 Hz) has coherence of ~1, and all three of the ~35 Hz lines do not have good coherence:

Fig. 1

The coherences were calculated with H1:CAL-CS_TDEP_COH_STRIDE set to 1/16 and H1:CAL-CS_TDEP_COH_BUFFER_SIZE (N in the original alog) set to 80 (at [-4, -2] min time interval) and 160 (at [-2, 1] min time interval). With H1:CAL-CS_TDEP_COH_BUFFER_SIZE set to 160, each of the coherence calculations include data points from past 10 seconds.

Images attached to this comment
darkhan.tuyenbayev@LIGO.ORG - 18:22, Wednesday 21 September 2016 (29891)CAL

Attached is a plot of the DARM time-dependent parameters calculated in the front-end when the IFO noise floor was reasonably low (at about 23 UTC). Notice that Y-axis for coherence is zoomed to 1 for a better detail.

It seems that the ER9 Matlab DARM model parameters for H1 that was used for calculation of current TDEP EPICS values needs an update. The ESD sign is opposite to the one in the DARM model. Calculation of κPU is hugely biased due to the wrong sign of κTST and it's magnitude being incorrect by an order of magnitude.

During last night's lock stretches the sign of κTST calculated in the front-end was positive (see attachment 2), opposite to the currently calculated value. A possible explanation for this is that L3 stage sign flip commisioning activities are underway (see LHO alog 29860).

Images attached to this comment
H1 AOS (AOS, SEI, SUS)
corey.gray@LIGO.ORG - posted 19:55, Thursday 15 September 2016 (29746)
Optical Lever 7 Day Trends

Neither PIT or YAW trends were near/approaching +/-10urads, so it looks fine.  Nothing obvious on the SUM trend either.

This CLOSES FAMIS #4693.

Images attached to this report
H1 ISC (ISC)
jenne.driggers@LIGO.ORG - posted 18:24, Thursday 15 September 2016 (29742)
Coil drivers state fixed

[Jenne, Sheila, Matt]

On our way to trying for some low noise, we went through the CoilDrivers state.  But, somehow there was some buggy code in there that it was only trying to switch the UL coil of all the optics ('PRM', 'PR2', 'SRM', 'SR2', 'BS', 'ETMY', 'ETMX', 'ITMY', 'ITMX') over and over again, and never going to any other coils.  After a few minutes of this, we lost lock.  I don't know that I can prove that that's why we lost it, but we lost lock on this state yesterday also, and certainly having 3 coils one way, and one coil continually going between states 1 and 3 isn't helping keep us locked. Code fixed, we'll try it again next lock.

H1 CAL (CAL)
darkhan.tuyenbayev@LIGO.ORG - posted 17:06, Thursday 15 September 2016 (29740)
Cal. line coherence calculation settings

Jeff K, Darkhan T,

Overview

CAL-CS synchronized oscillator settings for cal. line coherence calculations were lost after the recent power glitch (LHO alog 29592). The settings were lost because after populating the settings (see LHO alog 28995) on August 10, not all of the channels were monitored by SDF_OVERVIEW.

Today we restored the coherence calculation settings and accepted the changes in SDF_OVERVIEW.

Details

The power glitch did not cause losses of the H1CALCS filters, so running set_coherence_h1.py (that populates filter modules) was not necessary this time (only changes names of the "1/f^2" filters to ":1,1", same as in PCAL models).

However filter module switches needed to be turned on (those previously weren't monitored by SDF_OVERIVEW). Some of the synchronized oscillator settings were also lost during the power glitch, they have been fixed now.

Today we updated coherence calculation settings for the following lines:

All channels have been added to the list of monitored channels and the values have been accepted in SDF_OVERVIEW tables (safe.snap and OBSERVE.snap).

Note: IFO was not locked when the screenshots were taken.

Images attached to this report
H1 CDS (DAQ)
david.barker@LIGO.ORG - posted 16:51, Thursday 15 September 2016 - last comment - 19:18, Thursday 15 September 2016(29739)
susprocpi model and DAQ restart

Terra, Dave:

new h1susprocpi model was installed. This adds 64x2k chans to the science frame. The 'place holder' zeroed data were removed at the same time. DAQ was restarted.

Comments related to this report
terra.hardwick@LIGO.ORG - 19:18, Thursday 15 September 2016 (29743)

These 64 channels we're now saving are the BP_IN1 and DAMP_OUT of each mode in the damping scheme, so essentially the pre-damping loop downconverted error signal and the post-damping loop pre-upconverted drive signal. 

H1 TCS
kiwamu.izumi@LIGO.ORG - posted 16:36, Thursday 15 September 2016 (29738)
HWSY complication

related to 29648,

The output from HWSY doesn't look reasonable. This is something we knew, but this time a surprising thing was that, if I interpret the data as it is, the self heating on ITMY introduced negative lensing rather than positive lensing. This does not make sense. See the second attachment below. The first attachment is the HWS signal for ITMX with its prediction from the TCS simulator for comparison.

Images attached to this report
H1 General
cheryl.vorvick@LIGO.ORG - posted 16:08, Thursday 15 September 2016 (29737)
Ops Day Summary:

State of H1: has locked and made it to DC readout

Activities:

Relocking:

 

H1 IOO (ISC, PSL)
chris.whittle@LIGO.ORG - posted 15:48, Thursday 15 September 2016 - last comment - 19:52, Thursday 15 September 2016(29735)
IMC PDH daughter board functionality

Jeff K, Chris Whittle

Following on aLOG 28363 (initial proposal) and 29250 (installation), we measured the open loop gain of the IMC loop (without full CARM) with the AG4395A, both with and without the daughter board 200 kHz pole. The GPIB is still connected to the AG4395A by the Common Mode Board.

TFAG4395A_15-09-2016_140247.txt has the transfer function without the daughter board, TFAG4395A_15-09-2016_140553.txt with the daughter board. The attached plots were generated with daughter_tf_plots.py.

See the attached plots of open loop gain, loop suppression and closed loop gain. Takeaways:

Also note some variation in the OLG at about 200 kHz compared to the previous measurement.

Images attached to this report
Non-image files attached to this report
Comments related to this report
jeffrey.kissel@LIGO.ORG - 19:52, Thursday 15 September 2016 (29745)ISC
J. Kissel

I've now measured the CARM Open Loop Gain Transfer Function in the two different states of the IMC PDH common mode board's new 200 kHz pole daughter board. As expected from above, the CARM loop is barely affected by the 200 kHz response change. (Also note that the daughter board can be turned on and off at will without affecting a 2W DC READOUT lock.) As such, I have left the 200 kHz pole enabled, and accepted H1:IMC-REFL_SERVO_FASTOPT as "On" in the down.snap of CS ECAT PLC2 beckhoff SDF system such that it sticks after reboots (there are no safe or OBSERVE.snaps for this SDF system).

Attached are the results of the measurement. 
TFAG4395A_15-09-2016_191957.txt is the open loop gain with the daughter board ENABLED.
TFAG4395A_15-09-2016_191352.txt is the open loop gain with the daughter board DISABLED.
Summarizing the attached plots in words: the CARM loop has a UGF of 15 kHz, with a phase margin of 40 [deg] and very tolerable amount of gain peaking at about a factor of 2 at 20 kHz, all regardless of the configuration of this switchable pole in the IMC PDH common mode board.

Images attached to this comment
Non-image files attached to this comment
H1 PSL
thomas.shaffer@LIGO.ORG - posted 14:32, Thursday 15 September 2016 (29734)
Weekly PSL Chiller Reservoir Top-Off

Added 200mL to the crystal chiller.

FAMIS#6488

H1 General
cheryl.vorvick@LIGO.ORG - posted 13:31, Thursday 15 September 2016 (29733)
Ops Mid-day Update:

State of H1: unlocked, maintenance activities

Activities:

As of 20:29UTC:

Commissining Work:  LSC and ISS

H1 CDS (ISC, PSL)
david.barker@LIGO.ORG - posted 12:56, Thursday 15 September 2016 (29732)
new PSL ISS and LSC code installed, DAQ restarted

Daniel, Keita, Dave:

we installed new versions of h1psliss and h1lsc. This required a DAQ restart.

LHO VE (VE)
gerardo.moreno@LIGO.ORG - posted 12:41, Thursday 15 September 2016 (29731)
IP10 and IP12 Controller Swap

A brief history of IP10, the controller for IP10 had A channel go somewhat bad on 9/3/2016, controller was set to output 5k volts but its output was only able to do about 2k, then we had a power glitch on 9/10/2016, that caused the current output to go down and the pressure to go up (see attached graph).

Since IP12 is currently valved out, where the pump is pumping on a small volume, we decided to swap controllers between pumps.  So for now IP12 will show some alarm values until the controller is fixed.  And to keep the small volume at IP12 good, we are pumping with one channel despite of what the signal says.

Images attached to this report
LHO VE
kyle.ryan@LIGO.ORG - posted 11:59, Thursday 15 September 2016 (29729)
Vented X-end Residual Gas Analyzer (RGA) volume for fastener retrofit
The factory flanged flange containing the inadequate fasteners was "gappy" enough that I tried the easy in-situ replacement of its fasteners but unfortunately it didn't work (2x10-8 torr*L/sec leak) and I had to vent the RGA volume and replace the gasket along with adding the good fasteners -> pumped down RGA volume and leak tested new joint -> No leak detected (Leak Detector baseline signal 3.5 x 10-9 torr*L/sec helium).  I didn't have the RGA laptop so I'll need to go out again at the next interferometer (IFO) downtime to verify the the RGA works after having being withdrawn from and reinserted into its protective nipple (this exercise can result in a grounding of some of the tight clearance electrodes upon re-insertion).  

Leaving work area shut down, i.e. there are no pumps running or related electronics energized etc. 
LHO FMCS
bubba.gateley@LIGO.ORG - posted 11:42, Thursday 15 September 2016 (29728)
Chilled water set point increase at Corner Station
I have increased the chilled water set point by 5 degrees F to 45 F on the corner station chiller.
H1 SEI
jim.warner@LIGO.ORG - posted 10:24, Thursday 15 September 2016 - last comment - 09:41, Monday 19 September 2016(29723)
EY BRS drift seems to have shanged direction?

The BRS at EY has had a long term drift requiring periodic recentering. That drift seems to have stopped or changed sign, following the power outage on Saturday. Attached image is a 60 day trend for H1:ISI-GND_BRS_ETMY_DRIFTMON. The black streaks are from when the BRS went out of range and when it was recentered during Krishna's last visit. The little blip up to zero at the end is from the power outage, before the commissioners recovered the BRS code. Second image is the last 6 days, outage is when the signal goes to zero. Definitely looks like the drift has changed sign.

Images attached to this report
Comments related to this report
krishna.venkateswara@LIGO.ORG - 10:41, Thursday 15 September 2016 (29724)

I checked the temperature ('H1:ISI-GND_BRS_ETMY_TEMPR') and it looks a bit lower than normal, so it doesn't account for the change in the drift. It may be good to go to EndY and check on the Ion pump controller and make sure that it is ON? If it didn't get turned on after the power outage, a rising pressure might be the cause for the change in drift. The Ion pump controller should have a High Voltage indicator which should be on and clicking the OK button should give you the pump current and pressure reading.

Images attached to this comment
jim.warner@LIGO.ORG - 12:31, Thursday 15 September 2016 (29730)

The ion pump was off. It took a couple tries to get it to come back on.  Voltage was around 5200V and 9-12 mA when I left the end station, pressure  was already back to ~1E-5 torr. The power supply is kind of hidden under some other stuff, under the beam tube. Gerardo tells me that the power supplies at each end station are different, the one at EX comes back on it's own, EY doesn't. I'll see about adding a note to the start up procedure in T1600103.

chandra.romel@LIGO.ORG - 09:41, Monday 19 September 2016 (29792)
IP power supply status should be added to vacuum GUI in CDS so we can catch power failures right away.
H1 ISC (ISC)
lisa.barsotti@LIGO.ORG - posted 02:46, Thursday 15 September 2016 - last comment - 16:18, Thursday 15 September 2016(29719)
Leaving the IFO locked at 50W, high noise
Sheila, Matt, Lisa

The ISS has been oscillating a couple of times when reaching 50W in the last two locks. Sheila fixed that by turning off the AC coupling.

We leave the IFO locked at 50W with the ISS AC coupling off, at Sep 15, 9.45UTC. It has been locked for about 20 minutes, powers are stable, no PIs.

Matt updated SDF with the latest PI settings.

We just noted that the PSL NOISE EATER is oscillating -- so please fix that in the morning.
Comments related to this report
kiwamu.izumi@LIGO.ORG - 09:23, Thursday 15 September 2016 (29721)

The 50 W lock lasted for about 3 hours. It is unclear what broke it. There were two PI modes (modes 10 and 26) which rung and weren't successfully damped. See the attached.

Images attached to this comment
terra.hardwick@LIGO.ORG - 16:18, Thursday 15 September 2016 (29736)

It's possible MODE 26 broke the lock, although lockloss occured when the amplitude of the mode was much lower than the usual breaking point. We're still re-finding settings after the ETMY ring heater change that happened yesterday afternoon and probably the gain sign was wrong on this mode. 

More interesting is the unusual broad noise between 14kHz and 16kHz seen the entire lock. In spectra below, orange is OMC trans showing high frequency behavior during last nights lock and a reference 'normal' lock from a few hours prior. Despite the suspicious frequency range, we don't think this noise is associated with PI (we've checked to make sure we weren't injecting, had wrong settings, etc.); even very high amplitude PI create a symmetric peak with much higher Q. Perhaps laser noise?

Below left is just after locking last night (note the cursor is sitting ~15410 Hz, an area where there's no known mechanical modes). Below right is ~5 seconds before the lockloss 3 hours later. PIs are ringing up in the latter, but amplitudes are below those that have broken locks in the past.

 

Below is a 'normal' spectrum from a lock earlier in the day while two PIs were ringing up to similar amplitdue. 

Images attached to this comment
H1 ISC
evan.hall@LIGO.ORG - posted 15:19, Monday 05 October 2015 - last comment - 17:46, Thursday 15 September 2016(22188)
Some CARM loop modeling

I have spent some time trying to understand the behavior of the CARM loop in full lock.

First, I have reduced the loop to the following block diagram:

P is the IFO, K is the IMC, and G is the FSS. F and M represent the fast and slow common-mode feedback paths, and A represents the IMC PDH board and the VCO. A fuller accounting of these blocks is given in the sections below.

The OLTF of CARM is then given by

[ H = frac{P(overline{G}AF+M)}{1-overline{G}AK},]

where [overline{G} = G/(1-G)] is the CLTF of the FSS. For the time being, I have ignored the slow IMC feedback (the crossover with the fast path happens below 100 Hz) and I have assumed the CLTF of the FSS is −1.

The model (described below) shows OK agreement with the measurement (taken 2015-08-14) between 1 and 40 kHz, but above that there is significant deviation in the phase.

I have also included a plot of the modeled IMC OLTF [ J = overline{G} A K]. Getting the model to agree with the measurement requires the inclusion of a mystery gain of 1/3, which I have rolled into the optical plant. Previous measurement of the IMC modulation index provided only an upper limit (which I have used here), so I am hoping that this explains some of the mystery gain.

❦ P(f): CARM optical plant, PD response, and CMB common path

The CARM plant is the TF taking laser frequency fluctuation to rf power on REFL9Q. It consists of the following (at 24 W):

  • dc gain 0.017 W/Hz [from Kiwamu's numerical/analytical analysis, assuming 300 mW of light on REFL9 out of lock and a 9 MHz modulation depth of 0.22 rad]
  • pole at 0.48 Hz [from Kiwamu's numerical/analytical analysis]
  • pole at 8.8 kHz [from transmission through the IMC]

This is multiplied by the PD TF, the SNB TF, and the CMB common TF:

  • dc gain of 2900 V/W from REFL9Q + demod
  • dc gain of 0 dB through the SNB
  • dc gain of −20 dB (CMB input gain)
  • 40 Hz pole, 4 kHz zero, ac gain of 1 (the CMB compensator)

Note that since this measurement we've added 7 dB to the common gain, and correspondingly removed 7 dB from the fast and slow paths. But that shouldn't matter for the OLTF estimate.

❦ F(f): CMB fast path, IMC ao gain

  • dc gain of 7 dB (CMB fast gain)
  • two zeros at 0 Hz, two poles at 5 Hz, ac gain of 1 (CMB fast HPF)
  • dc gain of −2 dB (IMC ao gain)

❦ M(f): CMB slow path, MC2 suspension

Not yet implemented. So far I have only considered the portion of the loop for which |AF| ≫ |M|.

❦ K(f): IMC optical plant, PD response, IMC board input gain

IMC optical plant, 24 W:

  • dc gain of  4.1×10−7 W/Hz [46 mW on IMC REFL out of lock (LHO#20117), modulation index 0.04 rad (upper limit; LHO#9395), fudge factor of 0.35]
  • pole at 8.8 kHz

PD response 880 V/W [responsivity 0.37 A/W (LHO#5277), transimpedance 476 V/A (ibid.), demod TF 5 V/V (rf volts to if volts; D0902745)]

IMC REFL input gain −3 dB [nominally 17 dB at 2.5 W PSL power]

❦ G(f): FSS OLTF

Currently, the CLTF G/(1 − G) is assumed to be −1. I have a measurement of G from Peter K, but I have not yet included it here. Below 100 kHz, the CLTF deviates from −1 Hz/Hz by less than 50 % in magnitude and 5° in phase (see attachment).

❦ A(f): IMC common/fast path and IMC VCO

IMC common/fast path TF:

  • 40 Hz pole / 4 kHz zero, ac gain 1
  • 1 kHz pole / 20 kHz zero, ac gain 1
  • dc gain −6 dB (IMC fast gain)
  • 140 kHz pole / 70 kHz zero, dc gain 1 (IMC fast path HPF)

IMC VCO TF:

  • dc gain: 537 kHz/V (installed in SFM for the IMC VCO)
  • pole at 1.6 Hz, zero at 40 Hz
Images attached to this report
Non-image files attached to this report
Comments related to this report
jeffrey.kissel@LIGO.ORG - 17:46, Thursday 15 September 2016 (29741)IOO
Evan has told me that the above diagram and OLTF equation are wrong.

He's given me the liberty to preempt the publication of his thesis and provide the erratum for this entry.

The open loop gain transfer function of the CARM loop is defined by the attached diagram, 

H = bar{G} A K P (F/K + M) / (1 - bar{G} A K)

Where again, 
G = open loop gain of the FSS
bar{G} = G / (1-G) = closed loop gain TF of the FSS
A = the IMC Common Mode Board and IMC VCO
P = electro-optical CARM plant of the IFO
K = electro-optical IMC plant
F = CARM fast path through CARM Common Mode Board (fed to the input of the IMC Common Mode Board to IMC VCO)
M = CARM slow path to IMC Length control of MC2


Non-image files attached to this comment
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