Sheila, Alexa, Kiwamu,

We noticed that occasionally the IMC locking loop kicks the FSS into a situation where the FSS oscillates for unknown reason.

We did not check what frequency the oscillation was, but this was visible in the PZT monitor in the FSS screen. It kept oscillating even after the IMC feedback onto FSS was disabled. We figured out that decreasing the common gain somehow fixes the oscillation. Strangely,  once the oscillation was gone, we could set the common gain back to the nominal of 30 dB without the oscillation. We believe that this oscillation is a part of the reason why the IMC did not recover right away when it looses the lock.

For the commissioning tonight, we reduced the common gain to 18.8 dB.

Sheila, Kiwamu,

Our focus tonight were:

• DRMI 3f lock
• DRMI WFS loops

(DRMI 3fs are now stable)

We succeeded in transitioning to the 3f signals in DRMI. We checked the demodulation phase of  REFLAIR_RF135 by exciting SRM and BS at a time. A good demod phase was found to be 56 deg while it had been -2.7 deg since the last week (see alog 14268). This demod phase was the one in which the SRCL signal is minimized in 135_Q. The resultant input elements are:

• RF27_I => PRCL = 1.0
• 135_Q => MICH = 0.7
• 135_I => SRCL = 0.3

I have not measured the open loop transfer functions yet, but so far I did not see a gain peaking. The SRM M2 stage coil output had an rms counts of about 1x10⁴ which is very OK in terms of the DAC saturation. I did not get a chance to see its long term stability. The ISC_DRMI guardian is edited accordingly and we confirmed that the guardian could transition to the 3fs automatically. Note that I enabled two whitening stages in REFLAIR_RF135. This saturates the ADC until the DRMI is locked, but once it is locked, the saturation does not seem to happen any more.

(some attempts on ASC loops)

For some reason, the SRCL mode-hop happened frequently tonight, even though the alignment was not too bad -- both PRC and SRC sideband power could fluctuate as small as a few % depending on misalignment which of course evolves on a time scale of order of 10 sec. So we decided to close the ASC loops rather than manually aligning the optics. We started from MICH which is ongoing.

There is a huge peak at 60 Hz in the damping singals on M0 of the SRM suspension. Also the noise floor seems too high compared with PRM. This must be fixed.

ETMX has tripped 4 times, and so has the BS.  We have been actuating on ETMX, but don't think that is the proble.  We definitely weren't actuating on the BS, there isn't anyone around in the LVEA.  Most of the time the WD plotting script has failed, I did get a plot for the BS though.

The slow feedback from the green reflection PDH is working again, with the frequency servo on the end station VCOs.  Hopefully this will make locking DIFF easier, since these should help to keep the DIFF PLL within its linear range, which it seems to be doing a reasonable job of right now.

Changes I've made are:

• the ALS guardian is not touching anything in the suspension, and we are locking with the filters used for DIFF locking in place. 
  • this means that the low pass which was previously in the ISCINF filters is now moved to ALS-C_ARMX ect.  The purpose of this filter is to make sure no impulse is sent to the suspension when the history is cleared for the integrators.
• I have also added a second low frequency integrator, replacing the +40dB that was previously in FM1 of the ALS-X_ARM filter module (and triggered by beckhoff).  This gives us more low frequency gain while still keeping our ugf low.
• These changes are in the guardian now.

We need to revist the length to PIT for ETMX at verry low frequencies.  This slow feedback is clearly misaligning the cavity.

Also late this afternoon early evening, ETMX ISI has tripped 3 times.  The plotting script failed,

J. Kissel, K. Venkateswara

We installed and tested the damping turn-table for the BRS. While the basic scheme seemed to be working, we turned it off as we experienced some grounding issues which need to be sorted out.

The turn-table has two 1-kg masses located diametrically opposite. It's angular position between 0 and 90 degrees is controlled by a stepper motor/controller which is in turn controlled by an analog signal between 0-5V.

The control signal is currently being written out by the BRS DAQ program to the USB DAC card. The stepper controller is kept floating so that the control-signal ground defines the ground for it. This was apparently causing the controller to restart irregularly. So I tried grounding one end of the control-signal to the platform (which is grounded through the ion pump). This may have been slightly better but unfortunately there seemed to be a big voltage drop (~2 V) across the DAC card's ground and the platform ground which was corrupting the control signal. Better grounding of the platform and controller may help.

ITMY on the SITEMAP was pulling up ISI_CUST_CHAMBER_OVERVIEW_Z_to_RZ_Decoupling.adl rather than ISI_CUST_CHAMBER_OVERVIEW.adl (this is the misfortune alluded to previously.)

I corrected this on the SITEMAP--you'll need to get a new one.

Additionally, ArnaudP, our old friend, landed a nice chunk of guardian realestate on the overview, very nice, thank you AP!

And with my corrections noted in the previous log below, the IOP DACKILL notices are all useful now.

SITEMAP and the OVERVIEW medms are committed to svn.

Through a series of unfortunate incidents, I ended up copying an older BSC-ISI Overview onto the current and lost changes made to naming of IOP_DACKILL channels.

However, following the guidence in the subject alog resulted in incorrect channel names.  The corrections to this guidence are:

$(IFO):IOP-SEI_$(IOP)_SEI$(CHAMBER)_DACKILL_STATE, with $(CHAMBER) taking the following values: 'BS', 'ITMX', 'ITMY', 'ETMX', 'ETMY'

This is not correct, it should be:

$(IFO):IOP-SEI_$(CHAMBER)_DACKILL_STATE, with $(CHAMBER) taking the following values: 'BS', 'ITMX', 'ITMY', 'ETMX', 'ETMY'

This line too in the medms needed to be corrected from $(IFO):IOP-$(IOP_NAME)_DACKILL_STATE  to $(IFO):IOP-SEI_$(CHAMBER)_DACKILL_STATE

I have added this correctioin to 12441.

Dave, Cyrus, Jim

An additional ADC card and an 18 bit DAC card was added to the I/O chassis for h1iscex and h1iscey.

At EX:

The 18 bit DAC was added to PCIe slot 11 (bus 2-4), making it the first DAC card on the bus.  The 18 bit adapter card was put into slot 2 of the backplane, while the 16 bit DAC adapter card was moved to slot 6 of the backplane. (The 18 bit DAC needs to be the first DAC card in the chassis, forcing the move of the 16 bit DAC adapter card).  The H1:ISC_DAC0 cable followed the 16 bit DAC adapter to slot 6.

There are now 4 ADC cards installed in the I/O chassis, in PCIe slots 1 (bus 0-1), 2 (bus 1-5), 3 (bus 1-4), and 7 (bus 1-6). An additional ADC adapter card was installed in slot 5 of the backplane, and the PEM AA chassis was connected to this card (it was connected to slot 1).  This caused the ADC card for the PEM model to be moved to the last ADC card.  The H1:ISC_ADC0 and H1:ISC_ADC1 cables were not moved, and the ADC card assignment for the h1iscex model didn't change.

The h1calex model would use ADC card 0 and DAC card 0.

At EY:

ADC cards were installed in slot 4, 5, and 6. These were removed, and ADC cards were installed in PCIe slots 1, 2, 3, and 7 to match EX. An additional ADC adapter card was installed in slot 5 of the backplane.

An 18 bit DAC card was installed in PCIe slot 11 (bus 2-4), while the existing 16 bit DAC remained in PCIe slot 10 (bus 2-5).  The 16 bit DAC adapter card was moved from backplane slot 2 to backplane slot 6, with the H1:ISC_DAC0 cable following the adapter card.  An 18 bit DAC adapter card was installed in backplane slot 2, so the 18 bit DAC card is the first DAC on the PCIe bus, and the 16 bit DAC is the second DAC on the PCIe bus.

The h1caley model would use ADC card 0 and DAC card 0.

For both EX and EY:
backplane assignments:
slot 1 ADC - h1cale(x,y) ADC card 0 
slot 2 DAC - h1cale(x,y) DAC card 0 (18 bit) (share with pem model)
slot 3 ADC - h1isce(x,y) ADC card 1
slot 4 ADC - h1isce(x,y) ADC card 2
slot 5 ADC - h1peme(x,y) ADC card 3
slot 6 DAC - h1isce(x,y) DAC card 0 (16 bit)

An error was made on the installation at EX, so data for the h1pemex and h1iscex models is invalid from 09:35 to 15:40 PDT.  During troubleshooting, a power cycle of the h1iscex I/O chassis caused errors on the h1susex and h1seiex models, requiring a restart of those computers.

The IRIG-B timing drifted on startup of EY, so data for h1pemey, h1iscey, and h1odcy in invalid from 11:15 to 13:42 PDT.

Cyrus, Jim,  Rick, Shivaraj, Dave

WP4888

Two new H1 front end models were created, h1calex and h1caley. They run on the end station ISC front ends, using the 4th user-model core. We assigned them the next two spare DCU-IDs  (h1calex=124, h1caley=125).

The cal models currently only have the PCAL subsystems. I took the latest version of the PCALX code from h1odcx (where it was temporarily installed for testing) and installed on both end stations. The models' channels have the prefix H1:CAL-PCAL[X,Y]_. The CAL models are located under SVN in the ISC path (isc/h1/models/h1cale[xy])

The CAL models use the first ADC because they require the DUOTONE timing signals. The PEM models were modified to use the 4th ADC. The ISC models continue to use the 2nd and 3rd ADC and did not need modification.

The CAL models use the newly installed 18bit DAC card. This card is also used by the PEM model to drive unused channels (I modifed PEM accordingly).

The DAQ master and H1EDCU_DAQ.ini files were modified to include the new CAL models.

The IOP models h1iopisce[xy] were modifed to add the 4th ADC and 18bit DAC.

All models on the ISC front ends and the DAQ were restarted several times during this install.

Here is a summary list of model changes

Ran new BNC cable from electronics high bay to tiltmeter in VEA.

The following electronics were installed at EY and EX.

18 Bit AI Chassis S1203483 - EX
18 Bit AI Chassis S1203519 - EY

Anti-Alias Chassis S1400574 - EX
Anti-Alias Chassis S1400575 - EY

Still waiting on cables from vendor that still need to get pulled.

8:17 am, Peter K and Rick S working inside the H1 PSL laser enclosure.
8:20 am, Hugh to CS VEA, survey of different chambers for CPS grounds.
8:50 am, Patrick from CS CR, conlog work, see his entry for more information.
9:28 am, Hugh to visit both end stations, continue with survey for CPS grounds.
9:30 am, Dave and Jim from somewhere in the CS, work per WP#4887.
9:37 am, Filiberto to visit both end stations, work on WP#4892.
9:48 am, Cyrus to Y-End station VEA, work on HWS computer.
10:10 am, Travis and Betsy to CS VEA, West bay work.
10:52 am, Aaron to CS VEA, install camera cable for TCS-Y, close to BSC1.
12:10 pm, Hugh to CS VEA, to add/install CPS ground @ BSC1.
12:15 pm, Krishna to X-End VEA, UW-PEM work.
1:30 pm, Filiberto to visit both End Stations, new location of cables need new labels.
1:56 pm, Betsy to CS VEA, work @ West bay, drill on hand.
2:12 pm, Jason and Doug to CS VEA, retrieve equipment.<---did not retrieve it but equipment was located.
2:35 pm, Filiberto to X-End station, power cycle equipment.
3:10 pm, Dave and Jim to X-end station, bring up equipment after power cycle.
3:21 pm, Andres and Jeff to visit both end stations, retrive parts/components.
3:52 pm, Travis to CS VEA, locate and retrive missing laser power meter that someone swiped.

PeterK and RickS

- FSS AOM replaced.  Heat sink, aluminum baseplate, kapton insulators, nylon screws added. (see photo below)

- Measured RF power at input to AOM: 22.5 Vp-p -> 7.96 Vrms -> 1.27 W.  About right.

- Aligned AOM.  Power just upstream of AOM: 68 mW; Power just downstream: 58 mW.  85% efficiency.  Very good.

- Second pass, measured just upstream of EOM: 47 mW; 81% efficiency.  Good.  Double-pass efficiency 69%.  Good.

- Power downstream of EOM, downstream of RC modematching lens L12: 47 mW.  Good.

- M27, first turning mirror downstream of EOM was not locked, now is.

- Aligned into reference cavity using two periscope mirrors.  Max Tx PD DC out: 2.37 V.  Locked both periscope mirror mounts.  TxPD DCout after locking mounts: 2.35 V.

- Centered beam on RFPD.  Locked all three actuators on first steering mirror upstream of RFPD.

- FSS RFPD unlocked: 360 mW; locked: 37 mV -> 90% visibility.  Not too bad.

- TTFSS gains (FAST/Common): 15/30 dB; measured UGF 340 kHz; phase margin > 50 deg.  Notch at 770 kHz.  Peaks at 1.77, 1.93, and 2.48 MHz up to within 2-3 dB of unity gain (see photo below).  Probably should be addressed by rolling the loop off more aggressively above 1 MHz, or so.

- Frontend watchdog disabled at start of work, enabled at close of work.

Overall, loop seems to be functioning well.

I have had a difficulty transitioning the SRCL signal from the 1f to 3f signal. Not solved yet.

After playing with ALS DIFF, I went through the initial alignment process and then moved onto the DRMI. As tested before (alog 14283), the 1f locking with REFLAIR was fine with a laser power of 10 W incident on IMC. However I kept failing in the transition from the 1f to 3f signals tonight. It was due to the SRCL loop which did not like the 3f signal tonight for unknown reason. The PRCL and MICH loops could be transitioned to RF27_I and RF135_Q respectively without a problem. But SRCL seemed to saturate the M2 stage DAC every time (??) when I tried to engaged RF135_I. I tried adjusting the demod phase, but did not seem to help. Also checked the optical gain by exciting SRCL and confirmed that the input element of -2 which was taken care by the guardian is right. Also tried it with two whitening stages on in REFL135, but this did not help either.

Note that the build up of the sideband power looked high tonight:

• ASAIR_RF90 = 3700 cnts
• POPAIR_RF18 = 220 uW

Also, I had the modified L2P decoupling filter engaged on the M2 stage of SRM (see alog 14304) all the time tonight.

J. Kissel

Following a similar procedure as was done for the ITMs (see LHO aLOG 14265), I've refined the calibration for the H1 SUS BS optical lever. The new calibrations are
BS P 6.9522 [ct/urad]
BS Y 3.8899 [ct/urad]

They've not yet been installed; will install tomorrow during maintenance.

DETAILS
------------
Currently, the alignment slider calibration gains are 
4.714 [ct/"urad"]
4.268 [ct/"urad"]
based on dead-reckoned knowledge of the actuation chain (see LLO aLOG 5362).

Sheila and Alexa recently found the alignment values for the beam splitter which gets red light onto the ETMY baffle PDs:
            P ["urad"]    Y ["urad"]
ETMY PD1      184.0        -255.0
ETMY PD4      237.1        -287.7
or a displacement of 
BS P    53.12 * 2 = 106.2 ["urad"]
BS Y    23.70 * 2 =  65.4 ["urad"]
where the factor of two comes from the single bounce optical lever effect.

I spoke with Gerardo who informed me that the numbers Keita had posted (LHO aLOG 9087) for the locations of the baffle PDs on the Arm Cavity Baffles are slightly off from reality. He gave me links to D1200296 (ETM) and D1200313 (ITM), which indicate that the PD locations are identical between an ITM and ETM baffle, and are 11.329 [inches] = 0.288 [m] apart in vertical, and 11.313 [inches] = 0.287 [m] apart in horizontal. Again using 3994.5 [m] for the length of the arm (LHO aLOG 11611), and adding 4.847+0.100+0.020+0.200 = 5.167 [m] for the distance between the HR surface of the BS and the back of the CP, through the thin CP, through the ITM QUAD's reaction-to-main chain gap, and through to the HR surface of ITM, respectively (D0901920), that's a lever arm of 3999.7 [m]. Hence, a displacement of
BS P   0.288 [m] / 3999.7 [m] = 72.01 [urad]
BS Y   0.287 [m] / 3999.7 [m] = 71.76 [urad]

The alignment offset slider gains should therefore be corrected by 
BS P  72.01 / 106.2 = 0.67806 [urad/"urad"]
BS Y  71.76 / 65.4  = 1.0972  [urad/"urad"]
or
BS P  1.4748 ["urad"/urad]
BS Y  0.91141 ["urad"/urad]

The new slider gains should therefore be
BS P    4.714 [ct/"urad"] * 1.4748 ["urad"/urad] = 6.9522 [ct/urad]
BS Y    4.268 [ct/"urad"] * 0.9114 ["urad"/urad] = 3.8899 [ct/urad]

We're now storing 4 alignments for the BS, 
                      P ["urad"]       Y  ["urad"]
BS Aligned              210.6             -271.4
   Misaligned           236.5             -287
   To EY ACB PD1        184               -255
   To EY ACB PD4        237.1             -287.7

which should therefore become,

                         P [urad]     Y [urad]
BS Aligned                142.8        -297.3
   Misaligned             160.3        -314.9
   To EY ACB PD1          124.76        160.77
   To EY ACB PD2          160.7         315.66

To do:
- Update calibration in OPTICALIGN gain
- Update calibration in M1 LOCK bank
- Update, confirm, and save corrected alignments
- Capture new safe.snap

SEI MEDM screens were all updated (HAM-ISI, BSC-ISI, HEPI) to account for the recent changes in the IOP Dackill channels names.

Displays are fully functional again for both HAM-ISI and HAM-HEPI. (before/after - notes)

BSC-ISI and BSC-HEPI need the IOP DACKILL parts to be updated so channel names match with chamber names, as It is currently the case on HAM chambers. DaveB has agreed to do those changes, and the related model restarts, next week so the BSC chamber IOP DACKILL channels are named as follow:
$(IFO):IOP-SEI_$(IOP)_SEI$(CHAMBER)_DACKILL_STATE, with $(CHAMBER) taking the following values: 'BS', 'ITMX', 'ITMY', 'ETMX', 'ETMY'

Work was performed under DaveB's WP #4672